From patchwork Wed Oct 19 11:28:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajendra Nayak X-Patchwork-Id: 9384311 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 83EBB600CA for ; Wed, 19 Oct 2016 15:07:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 76122282F5 for ; Wed, 19 Oct 2016 15:07:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6AB34299B2; Wed, 19 Oct 2016 15:07:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3DDED282F5 for ; Wed, 19 Oct 2016 15:07:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S943779AbcJSPHd (ORCPT ); Wed, 19 Oct 2016 11:07:33 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:42737 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S944352AbcJSPGm (ORCPT ); Wed, 19 Oct 2016 11:06:42 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 2816861B01; Wed, 19 Oct 2016 11:29:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1476876540; bh=UUI5bNj4Wn7/D4e2SRbs9hF2tTwegdpGMsw/gGkxxKY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pP3duTKpUWmGp+0Ms8mZLmjywkuBgsh86IZ7fd43OWClQjvFINQN6aWLIAqo1ZrIC wlojrBUDFNiv9LLJ8jmJuUO4viR0ToIbTU08hvtf75t8MdqjjdxDzCro74B1sb4uvh tZDFQp92+7s7jPq9N0b+I4l+wYAEkw0h778G90pU= Received: from blr-ubuntu-34.ap.qualcomm.com (unknown [202.46.23.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: rnayak@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 513E261AC3; Wed, 19 Oct 2016 11:28:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1476876539; bh=UUI5bNj4Wn7/D4e2SRbs9hF2tTwegdpGMsw/gGkxxKY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=L8rOFIhaZbNakhYutKH1JIqhG/QYamKjTjnE8KFEa+ywRVYlIqNrsooYuFE66TsW8 ol6/bo7eTGQEzdEvkCHnB9Qtqzzy4+3bWHfgG5acPO79afVWTOJ6/YHofjZcLXLfMq uUV/Yv+Vz3EyxvwhNrh4DECxMgDHqB88LjhDXoCQ= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 513E261AC3 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=rnayak@codeaurora.org From: Rajendra Nayak To: sboyd@codeaurora.org, mturquette@baylibre.com Cc: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, tdas@codeaurora.org, Rajendra Nayak Subject: [PATCH 2/7] clk: qcom: Add a custom udelay needed for some branch clocks Date: Wed, 19 Oct 2016 16:58:38 +0530 Message-Id: <1476876523-27378-3-git-send-email-rnayak@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1476876523-27378-1-git-send-email-rnayak@codeaurora.org> References: <1476876523-27378-1-git-send-email-rnayak@codeaurora.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some branch clocks marked with a BRANCH_HALT_DELAY might need more than the default 10us delay. Have a way to specify a custom delay in such cases Signed-off-by: Rajendra Nayak Acked-by: Bjorn Andersson --- drivers/clk/qcom/clk-branch.c | 5 ++++- drivers/clk/qcom/clk-branch.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index 26f7af31..1c11f12 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -82,7 +82,10 @@ static int clk_branch_wait(const struct clk_branch *br, bool enabling, return 0; if (br->halt_check == BRANCH_HALT_DELAY || (!enabling && voted)) { - udelay(10); + if (br->udelay) + udelay(br->udelay); + else + udelay(10); } else if (br->halt_check == BRANCH_HALT_ENABLE || br->halt_check == BRANCH_HALT || (enabling && voted)) { diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 284df3f..4c56a35 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -26,6 +26,7 @@ * @halt_reg: halt register * @halt_bit: ANDed with @halt_reg to test for clock halted * @halt_check: type of halt checking to perform + * @udelay: custom udelay incase of BRANCH_HALT_DELAY, default is 10us * @clkr: handle between common and hardware-specific interfaces * * Clock which can gate its output. @@ -43,6 +44,7 @@ struct clk_branch { #define BRANCH_HALT_ENABLE_VOTED (BRANCH_HALT_ENABLE | BRANCH_VOTED) #define BRANCH_HALT_DELAY 2 /* No bit to check; just delay */ + u32 udelay; struct clk_regmap clkr; };