From patchwork Wed Jan 25 09:15:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 9536637 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7EF3E6046A for ; Wed, 25 Jan 2017 09:46:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6AE461FF28 for ; Wed, 25 Jan 2017 09:46:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5F08426E69; Wed, 25 Jan 2017 09:46:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 07DED1FF28 for ; Wed, 25 Jan 2017 09:46:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751686AbdAYJpR (ORCPT ); Wed, 25 Jan 2017 04:45:17 -0500 Received: from andre.telenet-ops.be ([195.130.132.53]:48224 "EHLO andre.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751575AbdAYJo6 (ORCPT ); Wed, 25 Jan 2017 04:44:58 -0500 Received: from ayla.of.borg ([84.193.137.253]) by andre.telenet-ops.be with bizsmtp id cZkr1u0015UCtCs01ZkrR6; Wed, 25 Jan 2017 10:44:57 +0100 Received: from ramsan.of.borg ([192.168.97.29] helo=ramsan) by ayla.of.borg with esmtp (Exim 4.82) (envelope-from ) id 1cWK8I-0004kM-O4; Wed, 25 Jan 2017 10:44:50 +0100 Received: from geert by ramsan with local (Exim 4.82) (envelope-from ) id 1cWJfZ-00075N-2w; Wed, 25 Jan 2017 10:15:09 +0100 From: Geert Uytterhoeven To: Philipp Zabel , Simon Horman , Magnus Damm , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH v2 3/4] clk: renesas: cpg-mssr: Rename cpg_mssr_priv.mstp_lock Date: Wed, 25 Jan 2017 10:15:02 +0100 Message-Id: <1485335703-27184-4-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1485335703-27184-1-git-send-email-geert+renesas@glider.be> References: <1485335703-27184-1-git-send-email-geert+renesas@glider.be> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The spinlock is used to protect Read-Modify-Write register accesses, which won't be limited to SMSTPCR register accesses. Signed-off-by: Geert Uytterhoeven Acked-by: Stephen Boyd --- v2: - Add Acked-by. --- drivers/clk/renesas/renesas-cpg-mssr.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index eb8534e5ebf3007d..f1161a585c57e433 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -98,7 +98,7 @@ * * @dev: CPG/MSSR device * @base: CPG/MSSR register block base address - * @mstp_lock: protects writes to SMSTPCR + * @rmw_lock: protects RMW register accesses * @clks: Array containing all Core and Module Clocks * @num_core_clks: Number of Core Clocks in clks[] * @num_mod_clks: Number of Module Clocks in clks[] @@ -107,7 +107,7 @@ struct cpg_mssr_priv { struct device *dev; void __iomem *base; - spinlock_t mstp_lock; + spinlock_t rmw_lock; struct clk **clks; unsigned int num_core_clks; @@ -144,7 +144,7 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk, enable ? "ON" : "OFF"); - spin_lock_irqsave(&priv->mstp_lock, flags); + spin_lock_irqsave(&priv->rmw_lock, flags); value = readl(priv->base + SMSTPCR(reg)); if (enable) @@ -153,7 +153,7 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) value |= bitmask; writel(value, priv->base + SMSTPCR(reg)); - spin_unlock_irqrestore(&priv->mstp_lock, flags); + spin_unlock_irqrestore(&priv->rmw_lock, flags); if (!enable) return 0; @@ -550,7 +550,7 @@ static int __init cpg_mssr_probe(struct platform_device *pdev) return -ENOMEM; priv->dev = dev; - spin_lock_init(&priv->mstp_lock); + spin_lock_init(&priv->rmw_lock); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); priv->base = devm_ioremap_resource(dev, res);