From patchwork Wed Mar 1 10:46:04 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 9598227 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9DDCC60453 for ; Wed, 1 Mar 2017 10:56:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACCA128445 for ; Wed, 1 Mar 2017 10:56:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A1C34284FE; Wed, 1 Mar 2017 10:56:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2727928445 for ; Wed, 1 Mar 2017 10:56:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752460AbdCAK4I (ORCPT ); Wed, 1 Mar 2017 05:56:08 -0500 Received: from mail-wm0-f49.google.com ([74.125.82.49]:38212 "EHLO mail-wm0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752455AbdCAKzU (ORCPT ); Wed, 1 Mar 2017 05:55:20 -0500 Received: by mail-wm0-f49.google.com with SMTP id u199so33075310wmd.1 for ; Wed, 01 Mar 2017 02:54:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WnPxcF6tcnJB0ZBx6NBn1pSNAHqmUnA/iJKc2EiUIVA=; b=KuHK7A/6XGFpKm/MT90/CH8y44GM0M++C7ONrqmPYZ7Y2ZrKU3GLZtKws1+xUPzN2b vItaqerDkrjKEqPLOKQPMp5Ha79mR+65XoXuN4mwKfkNYsX38JFHzZigYXSPbFx/xpRD qIaNwtrHIhOGu4QDqmFPKMaL2NkRhcgsKnGg61Y3IAkUjkmZtLtDMVx0mFAWgzwYKlR/ jRx+8qxLv39CJ1Gg3g+bOtj2XfbkSTNUYJDvUMN1WmrUUuM4NH9a0DzGIEiXxqUagoSe P+BY7pLwTWbiMAAFL0ZR1S9M7id4zLZ2NBBHIDnb20hoOYK5V/HSsWp/jrdevykXrCiC My5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WnPxcF6tcnJB0ZBx6NBn1pSNAHqmUnA/iJKc2EiUIVA=; b=G0Zzg2qiqZXZJY9wQGqe/PVbqvYDGP2MgzmiYxpPebI2cm6eok3wZDYHEr+r/RlWc7 MpTfmZQOV+R1iaZxw7XanycY4cwV3nPyKG2fCMIPZyns3n2tkG0cmHP4bGF75SAkfI/O GjYWao0aWA6/kOyCiDwP1t+fnQK8ZDHjO6WyggLam/HslckfBlM3Vki/6VqkwfgAS9py zG6/kb3Sr8nCLJg5As7qojlf77KhfckLbNMgmw7HfVLTD2i03Zk6vUCu67QgUaV12TWM YiLik8+pzpfwUFrhVJ4k4RUGWtyJTlAbQHo9hRPxbnN21wFwwE83fbERLR8S2XS2F5jo mZ6Q== X-Gm-Message-State: AMke39l1tJV60EIm5jK3aHsEbcWk4s/Fi1fJm/+afs5vCRziST7LPl82w9GNYpksPRoKVjTZ X-Received: by 10.28.214.144 with SMTP id n138mr2606810wmg.136.1488365173179; Wed, 01 Mar 2017 02:46:13 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id m201sm6399691wmd.19.2017.03.01.02.46.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Mar 2017 02:46:12 -0800 (PST) From: Neil Armstrong To: sboyd@codeaurora.org, khilman@baylibre.com, carlo@caione.org Cc: Neil Armstrong , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 3/3] ARM64: dts: meson-gx: Add MALI nodes for GXBB and GXL Date: Wed, 1 Mar 2017 11:46:04 +0100 Message-Id: <1488365164-22861-4-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1488365164-22861-1-git-send-email-narmstrong@baylibre.com> References: <1488365164-22861-1-git-send-email-narmstrong@baylibre.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The same MALI-450 MP3 GPU is present in the GXBB and GXL SoCs. The node is simply added in the meson-gxbb.dtsi file. For GXL, since a lot is shared with the GXM that has a MALI-T820 IP, this patch adds a new meson-gxl-mali.dtsi and is included in the SoC specific dtsi files. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 37 ++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | 43 ++++++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi | 1 + arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi | 1 + 4 files changed, 82 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index b353073..4f7ae6a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -474,6 +474,43 @@ }; }; +&apb { + mali: gpu@c0000 { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; +}; + &i2c_A { clocks = <&clkc CLKID_I2C>; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi new file mode 100644 index 0000000..f06cc234 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2017 BayLibre SAS + * Author: Neil Armstrong + * + * SPDX-License-Identifier: (GPL-2.0+ OR MIT) + */ + +&apb { + mali: gpu@c0000 { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = , + , + , + , + , + , + , + , + , + ; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + /* + * Mali clocking is provided by two identical clock paths + * MALI_0 and MALI_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + */ + assigned-clocks = <&clkc CLKID_MALI_0_SEL>, + <&clkc CLKID_MALI_0>, + <&clkc CLKID_MALI>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, + <0>, /* Do Nothing */ + <&clkc CLKID_MALI_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <666666666>, + <0>; /* Do Nothing */ + }; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi index 615308e..5a90e30 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi @@ -42,6 +42,7 @@ */ #include "meson-gxl.dtsi" +#include "meson-gxl-mali.dtsi" / { compatible = "amlogic,s905d", "amlogic,meson-gxl"; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi index 08237ee..0f78d83 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi @@ -42,6 +42,7 @@ */ #include "meson-gxl.dtsi" +#include "meson-gxl-mali.dtsi" / { compatible = "amlogic,s905x", "amlogic,meson-gxl";