From patchwork Sat Mar 11 12:50:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 9618645 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E3D5C604A9 for ; Sat, 11 Mar 2017 12:52:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DC663286E6 for ; Sat, 11 Mar 2017 12:52:19 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D1532287AA; Sat, 11 Mar 2017 12:52:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4502F286E6 for ; Sat, 11 Mar 2017 12:52:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755654AbdCKMwT (ORCPT ); Sat, 11 Mar 2017 07:52:19 -0500 Received: from fllnx209.ext.ti.com ([198.47.19.16]:16740 "EHLO fllnx209.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755628AbdCKMwS (ORCPT ); Sat, 11 Mar 2017 07:52:18 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v2BCopfG012962; Sat, 11 Mar 2017 06:50:51 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1489236651; bh=DloqB/PVGLBHFeOPlOk0iPkIzUM83ft4MJeLTYfwveI=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=QG3lrlOCIiGkLlch2nLldubBT6afd2RyE/IzXuXuzR+ym+ACZf7w6pgtz9NCVMBXE zdphAV4nkp59VZY7FMDftHCyFXVFMwXERK/ugsARTQpuTvVeydJRXE9LLgsB78ulAO ULAagByaGJVmT/BLTqOPMMDrH5l+xuaC8dxsCAY8= Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2BCoktR028385; Sat, 11 Mar 2017 06:50:46 -0600 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Sat, 11 Mar 2017 06:50:45 -0600 Received: from gomoku.home (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v2BCoHhw015557; Sat, 11 Mar 2017 06:50:41 -0600 From: Tero Kristo To: , , , , CC: Subject: [PATCHv2 09/15] clk: ti: drop unnecessary MEMMAP_ADDRESSING flag Date: Sat, 11 Mar 2017 14:50:00 +0200 Message-ID: <1489236606-24023-10-git-send-email-t-kristo@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1489236606-24023-1-git-send-email-t-kristo@ti.com> References: <1489236606-24023-1-git-send-email-t-kristo@ti.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This has been superceded by the usage of ti_clk_ll_ops for now. Signed-off-by: Tero Kristo Acked-by: Tony Lindgren --- drivers/clk/ti/apll.c | 1 - drivers/clk/ti/dpll.c | 2 -- drivers/clk/ti/gate.c | 4 +--- drivers/clk/ti/interface.c | 1 - include/linux/clk/ti.h | 2 -- 5 files changed, 1 insertion(+), 9 deletions(-) diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c index 62b5db7..5cba28c 100644 --- a/drivers/clk/ti/apll.c +++ b/drivers/clk/ti/apll.c @@ -194,7 +194,6 @@ static void __init of_dra7_apll_setup(struct device_node *node) clk_hw->dpll_data = ad; clk_hw->hw.init = init; - clk_hw->flags = MEMMAP_ADDRESSING; init->name = node->name; init->ops = &apll_ck_ops; diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c index 37624e1..c149bd1 100644 --- a/drivers/clk/ti/dpll.c +++ b/drivers/clk/ti/dpll.c @@ -248,7 +248,6 @@ struct clk *ti_clk_register_dpll(struct ti_clk *setup) clk_hw->dpll_data = dd; clk_hw->ops = &clkhwops_omap3_dpll; clk_hw->hw.init = &init; - clk_hw->flags = MEMMAP_ADDRESSING; init.name = setup->name; init.ops = ops; @@ -380,7 +379,6 @@ static void __init of_ti_dpll_setup(struct device_node *node, clk_hw->dpll_data = dd; clk_hw->ops = &clkhwops_omap3_dpll; clk_hw->hw.init = init; - clk_hw->flags = MEMMAP_ADDRESSING; init->name = node->name; init->ops = ops; diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c index b3291db..5ff62e2 100644 --- a/drivers/clk/ti/gate.c +++ b/drivers/clk/ti/gate.c @@ -113,7 +113,7 @@ static struct clk *_register_gate(struct device *dev, const char *name, clk_hw->enable_bit = bit_idx; clk_hw->ops = hw_ops; - clk_hw->flags = MEMMAP_ADDRESSING | clk_gate_flags; + clk_hw->flags = clk_gate_flags; init.parent_names = &parent_name; init.num_parents = 1; @@ -203,7 +203,6 @@ struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup) ops = &clkhwops_iclk_wait; gate->ops = ops; - gate->flags = MEMMAP_ADDRESSING; return &gate->hw; } @@ -269,7 +268,6 @@ static void __init _of_ti_gate_clk_setup(struct device_node *node, gate->enable_bit = val; gate->ops = hw_ops; - gate->flags = MEMMAP_ADDRESSING; if (!ti_clk_add_component(node, &gate->hw, CLK_COMPONENT_TYPE_GATE)) return; diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c index 7927e1a..42d9fd4 100644 --- a/drivers/clk/ti/interface.c +++ b/drivers/clk/ti/interface.c @@ -47,7 +47,6 @@ static struct clk *_register_interface(struct device *dev, const char *name, clk_hw->hw.init = &init; clk_hw->ops = ops; - clk_hw->flags = MEMMAP_ADDRESSING; clk_hw->enable_reg = reg; clk_hw->enable_bit = bit_idx; diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index 626ae94..affdabd 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -168,7 +168,6 @@ struct clk_hw_omap { * should be used. This is a temporary solution - a better approach * would be to associate clock type-specific data with the clock, * similar to the struct dpll_data approach. - * MEMMAP_ADDRESSING: Use memmap addressing to access clock registers. */ #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ #define CLOCK_IDLE_CONTROL (1 << 1) @@ -176,7 +175,6 @@ struct clk_hw_omap { #define ENABLE_ON_INIT (1 << 3) /* Enable upon framework init */ #define INVERT_ENABLE (1 << 4) /* 0 enables, 1 disables */ #define CLOCK_CLKOUTX2 (1 << 5) -#define MEMMAP_ADDRESSING (1 << 6) /* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */ #define DPLL_LOW_POWER_STOP 0x1