From patchwork Wed Mar 22 13:20:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter De Schrijver X-Patchwork-Id: 9638783 X-Patchwork-Delegate: sboyd@codeaurora.org Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 785BB60327 for ; Wed, 22 Mar 2017 13:21:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 618E42845C for ; Wed, 22 Mar 2017 13:21:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 549EA28464; Wed, 22 Mar 2017 13:21:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 232352845C for ; Wed, 22 Mar 2017 13:21:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759474AbdCVNVE (ORCPT ); Wed, 22 Mar 2017 09:21:04 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:17385 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759596AbdCVNVD (ORCPT ); Wed, 22 Mar 2017 09:21:03 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Wed, 22 Mar 2017 06:30:02 -0700 Received: from HQMAIL105.nvidia.com ([172.20.13.39]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 22 Mar 2017 06:20:10 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 22 Mar 2017 06:20:10 -0700 Received: from UKMAIL101.nvidia.com (10.26.138.13) by HQMAIL105.nvidia.com (172.20.187.12) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Wed, 22 Mar 2017 13:20:09 +0000 Received: from tbergstrom-lnx.Nvidia.com (10.21.24.170) by UKMAIL101.nvidia.com (10.26.138.13) with Microsoft SMTP Server (TLS) id 15.0.1263.5; Wed, 22 Mar 2017 13:20:06 +0000 Received: from tbergstrom-lnx.nvidia.com (localhost [127.0.0.1]) by tbergstrom-lnx.Nvidia.com (Postfix) with ESMTP id AC838F8005C; Wed, 22 Mar 2017 15:20:05 +0200 (EET) From: Peter De Schrijver To: Peter De Schrijver , Michael Turquette , Stephen Boyd , , CC: Alex Frid Subject: [PATCH] clk: Add requested rate to clock summary output Date: Wed, 22 Mar 2017 15:20:03 +0200 Message-ID: <1490188803-13034-1-git-send-email-pdeschrijver@nvidia.com> X-Mailer: git-send-email 1.9.1 X-NVConfidentiality: public MIME-Version: 1.0 X-Originating-IP: [10.21.24.170] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Alex Frid Added requested rate to clock summary output and to clock dump. This is useful for clock tree debugging. Also expand the clock name field in the clock tree debugfs output to provide room for deep multi-tier trees like on Tegra. Signed-off-by: Alex Frid Signed-off-by: Peter De Schrijver --- drivers/clk/clk.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 0b815d1..3f6ae6d 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -2007,10 +2007,10 @@ static void clk_summary_show_one(struct seq_file *s, struct clk_core *c, if (!c) return; - seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", + seq_printf(s, "%*s%-*s %11d %12d %11lu %11lu %10lu %-3d\n", level * 3 + 1, "", - 30 - level * 3, c->name, - c->enable_count, c->prepare_count, clk_core_get_rate(c), + 48 - level * 3, c->name, c->enable_count, + c->prepare_count, clk_core_get_rate(c), c->req_rate, clk_core_get_accuracy(c), clk_core_get_phase(c)); } @@ -2033,8 +2033,8 @@ static int clk_summary_show(struct seq_file *s, void *data) struct clk_core *c; struct hlist_head **lists = (struct hlist_head **)s->private; - seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); - seq_puts(s, "----------------------------------------------------------------------------------------\n"); + seq_puts(s, " clock enable_cnt prepare_cnt rate req_rate accuracy phase\n"); + seq_puts(s, "----------------------------------------------------------------------------------------------------------------------\n"); clk_prepare_lock(); @@ -2070,6 +2070,7 @@ static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level) seq_printf(s, "\"enable_count\": %d,", c->enable_count); seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); seq_printf(s, "\"rate\": %lu,", clk_core_get_rate(c)); + seq_printf(s, "\"req_rate\": %lu,", c->req_rate); seq_printf(s, "\"accuracy\": %lu,", clk_core_get_accuracy(c)); seq_printf(s, "\"phase\": %d", clk_core_get_phase(c)); }