From patchwork Wed Jan 16 18:37:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 10766763 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4233E139A for ; Wed, 16 Jan 2019 18:38:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 319012B48B for ; Wed, 16 Jan 2019 18:38:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 243152CC67; Wed, 16 Jan 2019 18:38:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B99782B48B for ; Wed, 16 Jan 2019 18:38:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729136AbfAPSix (ORCPT ); Wed, 16 Jan 2019 13:38:53 -0500 Received: from relmlor1.renesas.com ([210.160.252.171]:47419 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729056AbfAPSix (ORCPT ); Wed, 16 Jan 2019 13:38:53 -0500 X-IronPort-AV: E=Sophos;i="5.56,487,1539615600"; d="scan'208";a="5355879" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 17 Jan 2019 03:38:51 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.37.13]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id A85B840F10E1; Thu, 17 Jan 2019 03:38:45 +0900 (JST) From: Fabrizio Castro To: Rob Herring , Mark Rutland , Wolfgang Grandegger , Marc Kleine-Budde , Michael Turquette , Stephen Boyd Cc: Biju Das , Simon Horman , Magnus Damm , "David S. Miller" , Geert Uytterhoeven , Thierry Reding , =?utf-8?q?Andreas_F=C3=A4rber?= , Alexandre Belloni , Kevin Hilman , Johan Hovold , Lukasz Majewski , Michal Simek , =?utf-8?b?TWljaGFsIFZva8OhxI0=?= , Martin Blumenstingl , Ben Whitten , Fabrizio Castro , Chris Paterson , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-can@vger.kernel.org, netdev@vger.kernel.org, linux-clk@vger.kernel.org, ebiharaml@si-linux.co.jp Subject: [PATCH 06/11] arm64: dts: renesas: r8a774c0-cat874: Add uSD support Date: Wed, 16 Jan 2019 18:37:49 +0000 Message-Id: <1547663874-29411-7-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1547663874-29411-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1547663874-29411-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Biju Das This patch adds uSD card support. Signed-off-by: Biju Das Reviewed-by: Fabrizio Castro Reviewed-by: Chris Paterson --- arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 50 +++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts index c545ce5..477a56b 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts +++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "r8a774c0.dtsi" +#include / { model = "Silicon Linux RZ/G2E 96board platform (CAT874)"; @@ -26,6 +27,29 @@ /* first 128MB is reserved for secure area. */ reg = <0x0 0x48000000 0x0 0x78000000>; }; + + vcc_sdhi0: regulator-vcc-sdhi0 { + compatible = "regulator-fixed"; + + regulator-name = "SDHI0 Vcc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + vccq_sdhi0: regulator-vccq-sdhi0 { + compatible = "regulator-gpio"; + + regulator-name = "SDHI0 VccQ"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + gpios-states = <1>; + states = <3300000 1 + 1800000 0>; + }; }; &extal_clk { @@ -37,6 +61,18 @@ groups = "scif2_data_a"; function = "scif2"; }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + + sdhi0_pins_uhs: sd0_uhs { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <1800>; + }; }; &scif2 { @@ -45,3 +81,17 @@ status = "okay"; }; + +&sdhi0 { + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; + pinctrl-names = "default", "state_uhs"; + + vmmc-supply = <&vcc_sdhi0>; + vqmmc-supply = <&vccq_sdhi0>; + cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; +};