From patchwork Tue Feb 14 21:01:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 9572885 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DEB1360578 for ; Tue, 14 Feb 2017 21:02:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CC36A27FA8 for ; Tue, 14 Feb 2017 21:02:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id BF55E283F6; Tue, 14 Feb 2017 21:02:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 53E2427FA8 for ; Tue, 14 Feb 2017 21:02:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752796AbdBNVCB (ORCPT ); Tue, 14 Feb 2017 16:02:01 -0500 Received: from mail-oi0-f44.google.com ([209.85.218.44]:32992 "EHLO mail-oi0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752731AbdBNVB7 (ORCPT ); Tue, 14 Feb 2017 16:01:59 -0500 Received: by mail-oi0-f44.google.com with SMTP id w204so77679098oiw.0 for ; Tue, 14 Feb 2017 13:01:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id; bh=rHhsSIOGh8j60Zp/rmS3MocLJ3ywg6IGUN4KhzPu/yc=; b=hGxpuPbvN5aIyrthgKpa+o9CcFEE99GJ0PYly5ukuIYP//kgngBuD+dmrMPXRhboSA SxFAjdLClDjFqmuZJ5gBxcvzlWtRYJeQTGgMHM0E2Akj77t+dwvFL5pQ+21eWJR1W+Cs QWs79Aj96/iNNF5dnX5X1+wtPTnPdd+i99ApE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=rHhsSIOGh8j60Zp/rmS3MocLJ3ywg6IGUN4KhzPu/yc=; b=JDeIPkCeLtgl8Wm0ATHeXABOkGtW69usVrwfBhPqPpxm48aw6KX9fiAMDJVu+1cP+X /JuGVSZD6wLhLnVWexDkecFxOEkdCHllQ2X/rhsobPzo5iDaf2wQK+1zO4cd2/xVQZWu OmGIzgNC7kC7LRgfbDAaZWQ4GQh6S7bbwc0MQLN9Tpn8gBNVdU7ebDJngkVfEv78NP5Y kPrN7N6UR9uUAZQ5fRq/4uyfn93CYvvQx47gz3jTs3nc2EVx+MUs+UGt+8fk/eokoiDD rl4v5s94lgESu25LlfONN46D8mKkzOACjkFi+EssP2riTFHDPPTdIyA5Z2NS2wDGzp5G 38kw== X-Gm-Message-State: AMke39mtLhVBUJvhxb1WQSlyM/R7k1722JGJmssfLtWQ2WYCT0OY0rRA4WXV9zlT5uSv53rt X-Received: by 10.84.133.163 with SMTP id f32mr38439409plf.64.1487106118751; Tue, 14 Feb 2017 13:01:58 -0800 (PST) Received: from tictac.mtv.corp.google.com ([172.22.65.76]) by smtp.gmail.com with ESMTPSA id a1sm2921887pgn.51.2017.02.14.13.01.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 14 Feb 2017 13:01:56 -0800 (PST) From: Douglas Anderson To: Heiko Stuebner Cc: linux-rockchip@lists.infradead.org, jwerner@chromium.org, hl@rock-chips.com, dbasehore@chromium.org, zhengxing@rock-chips.com, Douglas Anderson , mturquette@baylibre.com, sboyd@codeaurora.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399 Date: Tue, 14 Feb 2017 13:01:14 -0800 Message-Id: <20170214210114.5846-1-dianders@chromium.org> X-Mailer: git-send-email 2.11.0.483.g087da7b7c-goog Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PMU Cortex M0 on rk3399 is intended to be used for things like DDRFreq transitions, suspend/resume, and other things that are the purview of ARM Trusted Firmware and not the kernel. As such, the kernel shouldn't be messing with the clocks. Add CLK_IGNORE_UNUSED to these clocks. Without this change, the following was observed on a Chromebook with a rk3399 (using not-yet-upstream ARM Trusted Firmware code and not-yet-upstream kernel code based on kernel-4.4): 1. We init the clock framework. 2. We start up "DDRFreq", which causes ATF to occasionally fire up the M0 for transitions. Each time ATF fires up the M0 it will turn on these clocks and each time it is done it will turn them off. 3. We finally get to the the part of the kernel that calls clk_disable_unused() and we disables the clocks. You can see the race above. Basically everything is fine as long as ARM Trusted Firmware isn't starting up the M0 at exactly the same time that the kernel is disabling unused clocks. ...but if the race happens then we go boom. Signed-off-by: Douglas Anderson --- drivers/clk/rockchip/clk-rk3399.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c index 73121b144634..fa3cbef08776 100644 --- a/drivers/clk/rockchip/clk-rk3399.c +++ b/drivers/clk/rockchip/clk-rk3399.c @@ -1477,10 +1477,10 @@ static struct rockchip_clk_branch rk3399_clk_pmu_branches[] __initdata = { GATE(PCLK_UART4_PMU, "pclk_uart4_pmu", "pclk_pmu_src", 0, RK3399_PMU_CLKGATE_CON(1), 14, GFLAGS), GATE(PCLK_WDT_M0_PMU, "pclk_wdt_m0_pmu", "pclk_pmu_src", 0, RK3399_PMU_CLKGATE_CON(1), 15, GFLAGS), - GATE(FCLK_CM0S_PMU, "fclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 0, GFLAGS), - GATE(SCLK_CM0S_PMU, "sclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 1, GFLAGS), - GATE(HCLK_CM0S_PMU, "hclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 2, GFLAGS), - GATE(DCLK_CM0S_PMU, "dclk_cm0s_pmu", "fclk_cm0s_src_pmu", 0, RK3399_PMU_CLKGATE_CON(2), 3, GFLAGS), + GATE(FCLK_CM0S_PMU, "fclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 0, GFLAGS), + GATE(SCLK_CM0S_PMU, "sclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 1, GFLAGS), + GATE(HCLK_CM0S_PMU, "hclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 2, GFLAGS), + GATE(DCLK_CM0S_PMU, "dclk_cm0s_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 3, GFLAGS), GATE(HCLK_NOC_PMU, "hclk_noc_pmu", "fclk_cm0s_src_pmu", CLK_IGNORE_UNUSED, RK3399_PMU_CLKGATE_CON(2), 5, GFLAGS), };