From patchwork Tue Mar 21 18:33:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 9637349 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 8DAA460328 for ; Tue, 21 Mar 2017 18:43:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7F26B28405 for ; Tue, 21 Mar 2017 18:43:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 73B4928304; Tue, 21 Mar 2017 18:43:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 90FCC28304 for ; Tue, 21 Mar 2017 18:43:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933173AbdCUSnN (ORCPT ); Tue, 21 Mar 2017 14:43:13 -0400 Received: from mail-wr0-f178.google.com ([209.85.128.178]:36810 "EHLO mail-wr0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933017AbdCUSmg (ORCPT ); Tue, 21 Mar 2017 14:42:36 -0400 Received: by mail-wr0-f178.google.com with SMTP id u108so117525894wrb.3 for ; Tue, 21 Mar 2017 11:42:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zY3bIhu1wytfDbGnIWrd7QQft3ewmpSSgeltwc66wnA=; b=0Zr89q+v4/fI7IAdWjJG9Quq/rG/6xzSjud2yk37PM7YtFN5WEIs55uSlOMzKs9wky LQ5jAuBgtmsaatFx2y+2Zd3fMy6qJmiKORwONqUjdm30V2qMs9P/hIa8hoQ3CdxZeB0B CV/DguCSPbwKdky/OhHsgIhAfBON2svGG8h85xdK6G7PZTlkzrs9wutsLEy4lj75jQ7K GTxVbIIiVlPnhnoVegWeLyw5nHW5m2ApZX83c7kEESCyL4nkozO5PIOtI7X4baHYF3eh ABYsgeD0vGmRPQAXwedkM7NDsFzMkBFrM2ihiQhmShBdu/3xmg7vPJaJO7zrNKnkNzy+ dAGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zY3bIhu1wytfDbGnIWrd7QQft3ewmpSSgeltwc66wnA=; b=LVzw3de0oR8R7ltyPY3A8nfGMDiq9BF3ngg8/YBHDgRSomV/JmwrKa6+FscZdISiDS gwQnkHvI2q4tezH0hLsA/+mK7ptpKu+B8DJR4EX0Y3iv9+A2KpBX8gdpcd0y5VbEuBKa HlRdSv1j6h0fiGDj/n+f+U/u4YN4eKPsaM5ywhRagSRUjxKyHa1x4/2GfO3yx3fMPzXV uJz+JDDe6AWZG5sNrAYDqYcBhq5OzGiAeXqvJ0RvR3LsdOjmvHnYvdoxf5zNyTQfiN3Y U+wnL7A66VP2fNTInHW3jg2i80YW8PzztHB/086z72bCPXEy16tpgYXgWdWwZ422CNpN aqaQ== X-Gm-Message-State: AFeK/H14IUULEpAiuRd8Rqdyv4xeh72CY++e+Mbb+GSO+ZgR3BprfpwSUOYTPaHLqEPX6fVG X-Received: by 10.223.160.9 with SMTP id k9mr35459711wrk.123.1490121217575; Tue, 21 Mar 2017 11:33:37 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id q12sm18667504wmd.8.2017.03.21.11.33.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 21 Mar 2017 11:33:37 -0700 (PDT) From: Jerome Brunet To: Michael Turquette , Stephen Boyd , Kevin Hilman Cc: Jerome Brunet , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org Subject: [RFC 2/7] clk: add set_phase core function Date: Tue, 21 Mar 2017 19:33:25 +0100 Message-Id: <20170321183330.26722-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170321183330.26722-1-jbrunet@baylibre.com> References: <20170321183330.26722-1-jbrunet@baylibre.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Create a core function for set_phase, as it is done for set_rate and set_parent. This rework is done to ease the integration of "protected" clock functionality. Signed-off-by: Jerome Brunet --- drivers/clk/clk.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index e77f03a47da6..57982a06dbce 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1876,6 +1876,23 @@ int clk_set_parent(struct clk *clk, struct clk *parent) } EXPORT_SYMBOL_GPL(clk_set_parent); +static int clk_core_set_phase(struct clk_core *core, int degrees) +{ + int ret = -EINVAL; + + if (!core) + return 0; + + trace_clk_set_phase(clk->core, degrees); + + if (core->ops->set_phase) + ret = core->ops->set_phase(core->hw, degrees); + + trace_clk_set_phase_complete(core, degrees); + + return ret; +} + /** * clk_set_phase - adjust the phase shift of a clock signal * @clk: clock signal source @@ -1898,7 +1915,7 @@ EXPORT_SYMBOL_GPL(clk_set_parent); */ int clk_set_phase(struct clk *clk, int degrees) { - int ret = -EINVAL; + int ret; if (!clk) return 0; @@ -1909,17 +1926,7 @@ int clk_set_phase(struct clk *clk, int degrees) degrees += 360; clk_prepare_lock(); - - trace_clk_set_phase(clk->core, degrees); - - if (clk->core->ops->set_phase) - ret = clk->core->ops->set_phase(clk->core->hw, degrees); - - trace_clk_set_phase_complete(clk->core, degrees); - - if (!ret) - clk->core->phase = degrees; - + ret = clk_core_set_phase(clk->core, degrees); clk_prepare_unlock(); return ret;