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[163.172.81.188]) by smtp.googlemail.com with ESMTPSA id 189sm2844439wmm.31.2017.03.31.06.04.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 31 Mar 2017 06:04:16 -0700 (PDT) From: Jerome Brunet To: Neil Armstrong , Michael Turquette , Stephen Boyd , Kevin Hilman , Carlo Caione Cc: Jerome Brunet , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/8] dt-bindings: clock: gxbb: expose spdif clock gates Date: Fri, 31 Mar 2017 15:04:04 +0200 Message-Id: <20170331130411.4781-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170331130411.4781-1-jbrunet@baylibre.com> References: <20170331130411.4781-1-jbrunet@baylibre.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Expose the clock gates required for the spdif output Acked-by: Michael Turquette Signed-off-by: Jerome Brunet --- drivers/clk/meson/gxbb.h | 4 ++-- include/dt-bindings/clock/gxbb-clkc.h | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/clk/meson/gxbb.h b/drivers/clk/meson/gxbb.h index 9d949244b104..0d535f7e7aed 100644 --- a/drivers/clk/meson/gxbb.h +++ b/drivers/clk/meson/gxbb.h @@ -209,7 +209,7 @@ /* CLKID_ETH */ #define CLKID_DEMUX 37 /* CLKID_AIU_GLUE */ -#define CLKID_IEC958 39 +/* CLKID_IEC958 */ /* CLKID_I2S_OUT */ #define CLKID_AMCLK 41 #define CLKID_AIFIFO2 42 @@ -251,7 +251,7 @@ #define CLKID_GCLK_VENCI_INT 78 #define CLKID_DAC_CLK 79 /* CLKID_AOCLK_GATE */ -#define CLKID_IEC958_GATE 81 +/* CLKID_IEC958_GATE */ #define CLKID_ENC480P 82 #define CLKID_RNG1 83 #define CLKID_GCLK_VENCI_INT1 84 diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h index cce6cb5418f1..1d4614bc8154 100644 --- a/include/dt-bindings/clock/gxbb-clkc.h +++ b/include/dt-bindings/clock/gxbb-clkc.h @@ -18,6 +18,7 @@ #define CLKID_SAR_ADC 23 #define CLKID_ETH 36 #define CLKID_AIU_GLUE 38 +#define CLKID_IEC958 39 #define CLKID_I2S_OUT 40 #define CLKID_MIXER_IFACE 44 #define CLKID_AIU 47 @@ -30,6 +31,7 @@ #define CLKID_SANA 69 #define CLKID_GCLK_VENCI_INT0 77 #define CLKID_AOCLK_GATE 80 +#define CLKID_IEC958_GATE 81 #define CLKID_AO_I2C 93 #define CLKID_SD_EMMC_A 94 #define CLKID_SD_EMMC_B 95