From patchwork Fri Apr 7 15:34:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 9669675 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 263A8602A0 for ; Fri, 7 Apr 2017 15:34:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 179E4285E8 for ; Fri, 7 Apr 2017 15:34:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0C53028607; Fri, 7 Apr 2017 15:34:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 60FB028609 for ; Fri, 7 Apr 2017 15:34:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756319AbdDGPek (ORCPT ); Fri, 7 Apr 2017 11:34:40 -0400 Received: from mail-wm0-f44.google.com ([74.125.82.44]:34819 "EHLO mail-wm0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755811AbdDGPej (ORCPT ); Fri, 7 Apr 2017 11:34:39 -0400 Received: by mail-wm0-f44.google.com with SMTP id w64so1537578wma.0 for ; Fri, 07 Apr 2017 08:34:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ht6GMuQQmSPG1X5Hx+W5AMidZ0tYpSME4SpUgWPbP/Y=; b=EpmxIqI/a2Dy8TbsaZdWAdiebJqLkO5bh2jDfsZeLHkCiDm/1kCiRV/5dLy0aVapq5 Y2niOH7D2ZzoH4uD8nzolljdc5z5G+IwlzCHFA51xrNFY3VOApakDGaftzKI1vWXv+f1 2SEnqs/e4rPJ2IgZAX3hocxcEG6HVRCsOw6BPlA94ZFCjFV7uPoxdRsdab4Ln4qHvjIg xdwJghfEZfiZ6EWH69rvxNczyXcn/fJrPANQX0MYL4cyUTr5bqp7aw+DX3UCRUa860IY XRskKpCDA5sIzGUs7xxheOFWaedwFwr30ak6CM6uxN6lReXwkfyhU9UGOITCLJxL2hEo qXnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ht6GMuQQmSPG1X5Hx+W5AMidZ0tYpSME4SpUgWPbP/Y=; b=TBrE8M9oGkIOub2tojZT5+CiuSVXFAv0M8W7VyYWbEU5lmr2xpy0iziwlt33jae1Wu QFUbJensEP6cs6fwRqBHgXsW0VDp+SBBQV4NLPb0FLTpjlqkn4Rd5bigCO0P0hMq2q7n om0nGkKSTQasWlzX5nLuANJSNh8FB3ituRZUriyTg7NJ0y4EatlL9taVHdPG0EUopr6Q kPQoiAJ5AZKVJVP8pZAZAC548j1hEX8OgpEe1v7gbz476WtAOXviZ5Yg6hGnN+5UerZ1 NblHhSsAr5aiV8Y0tPx1g6YdTEsDFu8JfuTYx6/x8O2ZFUNDwpHCczSUUyFVXA0IZjis MP7A== X-Gm-Message-State: AFeK/H3sBLI8FV1jQp1Gs3yZ+s3p/vDBkfZgk3N6b0dG8Nyojc6oQwofoPAJOppDw9Y8UtLi X-Received: by 10.28.146.12 with SMTP id u12mr30044151wmd.142.1491579278051; Fri, 07 Apr 2017 08:34:38 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id 82sm3655870wmg.0.2017.04.07.08.34.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 07 Apr 2017 08:34:37 -0700 (PDT) From: Jerome Brunet To: Martin Blumenstingl , Neil Armstrong , Kevin Hilman , Michael Turquette , Stephen Boyd Cc: linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, carlo@caione.org, Jerome Brunet Subject: [PATCH v2 1/2] clk: meson: mpll: fix division by zero in rate_from_params Date: Fri, 7 Apr 2017 17:34:32 +0200 Message-Id: <20170407153433.18640-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170407153433.18640-1-jbrunet@baylibre.com> References: <20170407153433.18640-1-jbrunet@baylibre.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Martin Blumenstingl According to the public datasheet all register bits in HHI_MPLL_CNTL7, HHI_MPLL_CNTL8 and HHI_MPLL_CNTL9 default to zero. On all GX SoCs these seem to be initialized by the bootloader to some default value. However, on my Meson8 board they are not initialized, leading to a division by zero in rate_from_params as the math is: (parent_rate * SDM_DEN) / ((SDM_DEN * 0) + 0) According to the datasheet, the minimum n2 value is 4. The rate provided by the clock when n2 is less than this minimum is unpredictable. In such case, we report an error. Although the rate_from_params function was only introduced recently the original bug has been there for much longer. It was only exposed recently when the MPLL clocks were added to the Meson8b clock driver. Fixes: 1c50da4f27 ("clk: meson: add mpll support") Signed-off-by: Martin Blumenstingl Signed-off-by: Jerome Brunet Reviewed-by: Neil Armstrong --- drivers/clk/meson/clk-mpll.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/drivers/clk/meson/clk-mpll.c b/drivers/clk/meson/clk-mpll.c index 540dabe5adad..d9462b505dcc 100644 --- a/drivers/clk/meson/clk-mpll.c +++ b/drivers/clk/meson/clk-mpll.c @@ -65,18 +65,21 @@ #include "clkc.h" #define SDM_DEN 16384 -#define SDM_MIN 1 -#define SDM_MAX 16383 #define N2_MIN 4 #define N2_MAX 511 #define to_meson_clk_mpll(_hw) container_of(_hw, struct meson_clk_mpll, hw) -static unsigned long rate_from_params(unsigned long parent_rate, +static long rate_from_params(unsigned long parent_rate, unsigned long sdm, unsigned long n2) { - return (parent_rate * SDM_DEN) / ((SDM_DEN * n2) + sdm); + unsigned long divisor = (SDM_DEN * n2) + sdm; + + if (n2 < N2_MIN) + return -EINVAL; + + return (parent_rate * SDM_DEN) / divisor; } static void params_from_rate(unsigned long requested_rate, @@ -89,17 +92,13 @@ static void params_from_rate(unsigned long requested_rate, if (div < N2_MIN) { *n2 = N2_MIN; - *sdm = SDM_MIN; + *sdm = 0; } else if (div > N2_MAX) { *n2 = N2_MAX; - *sdm = SDM_MAX; + *sdm = SDM_DEN - 1; } else { *n2 = div; *sdm = DIV_ROUND_UP(rem * SDM_DEN, requested_rate); - if (*sdm < SDM_MIN) - *sdm = SDM_MIN; - else if (*sdm > SDM_MAX) - *sdm = SDM_MAX; } } @@ -109,6 +108,7 @@ static unsigned long mpll_recalc_rate(struct clk_hw *hw, struct meson_clk_mpll *mpll = to_meson_clk_mpll(hw); struct parm *p; unsigned long reg, sdm, n2; + long rate; p = &mpll->sdm; reg = readl(mpll->base + p->reg_off); @@ -118,7 +118,11 @@ static unsigned long mpll_recalc_rate(struct clk_hw *hw, reg = readl(mpll->base + p->reg_off); n2 = PARM_GET(p->width, p->shift, reg); - return rate_from_params(parent_rate, sdm, n2); + rate = rate_from_params(parent_rate, sdm, n2); + if (rate < 0) + return 0; + + return rate; } static long mpll_round_rate(struct clk_hw *hw,