From patchwork Thu Apr 13 02:13:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 9678603 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9F98860387 for ; Thu, 13 Apr 2017 02:14:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 91AE02863B for ; Thu, 13 Apr 2017 02:14:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 85DC228648; Thu, 13 Apr 2017 02:14:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F09C528651 for ; Thu, 13 Apr 2017 02:14:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755977AbdDMCOY (ORCPT ); Wed, 12 Apr 2017 22:14:24 -0400 Received: from mirror2.csie.ntu.edu.tw ([140.112.30.76]:43914 "EHLO wens.csie.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755569AbdDMCOB (ORCPT ); Wed, 12 Apr 2017 22:14:01 -0400 Received: by wens.csie.org (Postfix, from userid 1000) id 85C515FD37; Thu, 13 Apr 2017 10:13:57 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard , Michael Turquette , Stephen Boyd Cc: Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH 3/3] clk: sunxi-ng: h3: gate then ungate PLL CPU clk after rate change Date: Thu, 13 Apr 2017 10:13:54 +0800 Message-Id: <20170413021354.3258-4-wens@csie.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170413021354.3258-1-wens@csie.org> References: <20170413021354.3258-1-wens@csie.org> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch utilizes the new PLL clk notifier to gate then ungate the PLL CPU clock after rate changes. This should prevent any system hangs resulting from cpufreq changes to the clk. Reported-by: Ondrej Jirman Signed-off-by: Chen-Yu Tsai Tested-by: Icenowy Zheng --- drivers/clk/sunxi-ng/ccu-sun8i-h3.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c index 4cbc1b701b7c..fc04ef2af1ac 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-h3.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-h3.c @@ -1103,6 +1103,13 @@ static const struct sunxi_ccu_desc sun50i_h5_ccu_desc = { .num_resets = ARRAY_SIZE(sun50i_h5_ccu_resets), }; +static struct ccu_pll_nb sun8i_h3_pll_cpu_nb = { + .common = &pll_cpux_clk.common, + /* copy from pll_cpux_clk */ + .enable = BIT(31), + .lock = BIT(28), +}; + static struct ccu_mux_nb sun8i_h3_cpu_nb = { .common = &cpux_clk.common, .cm = &cpux_clk.mux, @@ -1130,6 +1137,10 @@ static void __init sunxi_h3_h5_ccu_init(struct device_node *node, sunxi_ccu_probe(node, reg, desc); + /* Gate then ungate PLL CPU after any rate changes */ + ccu_pll_notifier_register(&sun8i_h3_pll_cpu_nb); + + /* Reparent CPU during PLL CPU rate changes */ ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk, &sun8i_h3_cpu_nb); }