| Message ID | 20170607200439.24450-2-paul@crapouillou.net (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
This is the v3 of my patchset that introduces support for the jz4770 SoC from Ingenic. The only change in the whole series is that now <dt-bindings/clock/jz4770-cgu.h> is introduced in a separate patch (05/18). -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index e8248f9185f7..eb9002ccf3fc 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -328,6 +328,8 @@ ingenic_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) div *= clk_info->div.div; rate /= div; + } else if (clk_info->type & CGU_CLK_FIXDIV) { + rate /= clk_info->fixdiv.div; } return rate;
Previously, the clocks with a fixed divider would report their rate as being the same as the one of their parent, independently of the divider in use. This commit fixes this behaviour. This went unnoticed as neither the jz4740 nor the jz4780 CGU code have clocks with fixed dividers yet. Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+)