From patchwork Sun Jul 30 16:41:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Jernej_=C5=A0krabec?= X-Patchwork-Id: 9870609 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 02278603B4 for ; Sun, 30 Jul 2017 16:48:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E8CA0283C9 for ; Sun, 30 Jul 2017 16:48:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DA928283C8; Sun, 30 Jul 2017 16:48:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 51313283C8 for ; Sun, 30 Jul 2017 16:48:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754297AbdG3QsG (ORCPT ); Sun, 30 Jul 2017 12:48:06 -0400 Received: from mailoutvs7.siol.net ([213.250.19.138]:35953 "EHLO mail.siol.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754125AbdG3QsE (ORCPT ); Sun, 30 Jul 2017 12:48:04 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTP id AA2E4520961; Sun, 30 Jul 2017 18:42:15 +0200 (CEST) X-Virus-Scanned: amavisd-new at psrvmta11.zcs-production.pri Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta11.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id lnv9Fn33eGin; Sun, 30 Jul 2017 18:42:15 +0200 (CEST) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTPS id 464D15208EB; Sun, 30 Jul 2017 18:42:15 +0200 (CEST) Received: from localhost.localdomain (cpe-86-58-68-135.ftth.triera.net [86.58.68.135]) (Authenticated sender: 031275009) by mail.siol.net (Postfix) with ESMTPSA id E13195208FA; Sun, 30 Jul 2017 18:42:12 +0200 (CEST) From: Jernej Skrabec To: maxime.ripard@free-electrons.com Cc: wens@csie.org, mturquette@baylibre.com, sboyd@codeaurora.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH 1/4] clk: sunxi-ng: Fix fractional mode for N-M clocks Date: Sun, 30 Jul 2017 18:41:47 +0200 Message-Id: <20170730164150.26302-2-jernej.skrabec@siol.net> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170730164150.26302-1-jernej.skrabec@siol.net> References: <20170730164150.26302-1-jernej.skrabec@siol.net> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP N-M factor clock driver is missing a call to ccu_frac_helper_enable() when fractional mode is used. Additionally, most SoCs require that M factor must be set to 0 when fractional mode is used. Without this patch, clock keeps the old value and clk_set_rate() returns without error. Fixes: 6174a1e24b0d ("clk: sunxi-ng: Add N-M-factor clock support") CC: Maxime Ripard Signed-off-by: Jernej Skrabec --- drivers/clk/sunxi-ng/ccu_nm.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu_nm.c b/drivers/clk/sunxi-ng/ccu_nm.c index 5e5e90a4a50c..c6ba866b99d3 100644 --- a/drivers/clk/sunxi-ng/ccu_nm.c +++ b/drivers/clk/sunxi-ng/ccu_nm.c @@ -117,10 +117,22 @@ static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long flags; u32 reg; - if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) + if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate)) { + spin_lock_irqsave(nm->common.lock, flags); + + /* most SoCs require M to be 0 if fractional mode is used */ + reg = readl(nm->common.base + nm->common.reg); + reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift); + writel(reg, nm->common.base + nm->common.reg); + + spin_unlock_irqrestore(nm->common.lock, flags); + + ccu_frac_helper_enable(&nm->common, &nm->frac); + return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate); - else + } else { ccu_frac_helper_disable(&nm->common, &nm->frac); + } _nm.min_n = nm->n.min ?: 1; _nm.max_n = nm->n.max ?: 1 << nm->n.width;