From patchwork Tue Oct 3 10:00:08 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 9982051 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9F9506038E for ; Tue, 3 Oct 2017 10:00:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8D2D52888F for ; Tue, 3 Oct 2017 10:00:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8174228897; Tue, 3 Oct 2017 10:00:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BBBF728885 for ; Tue, 3 Oct 2017 10:00:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751538AbdJCKAe (ORCPT ); Tue, 3 Oct 2017 06:00:34 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:51419 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751396AbdJCKAc (ORCPT ); Tue, 3 Oct 2017 06:00:32 -0400 Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout1.w1.samsung.com (KnoxPortal) with ESMTP id 20171003100030euoutp01fc85b735e0986682585c1020a81116d2~qBxlNdjBO2905729057euoutp01J; Tue, 3 Oct 2017 10:00:30 +0000 (GMT) Received: from eusmges5.samsung.com (unknown [203.254.199.245]) by eucas1p1.samsung.com (KnoxPortal) with ESMTP id 20171003100029eucas1p13957e05912c7c2ef70dbbeca7c24c846~qBxkjvKja2729927299eucas1p1M; Tue, 3 Oct 2017 10:00:29 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges5.samsung.com (EUCPMTA) with SMTP id 92.27.12743.DBF53D95; Tue, 3 Oct 2017 11:00:29 +0100 (BST) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20171003100029eucas1p2c706e911f316a58f35be7c443824f07c~qBxj5hayE1680016800eucas1p29; Tue, 3 Oct 2017 10:00:29 +0000 (GMT) X-AuditID: cbfec7f5-f79d06d0000031c7-36-59d35fbd2da8 Received: from eusync2.samsung.com ( [203.254.199.212]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 1F.91.18832.DBF53D95; Tue, 3 Oct 2017 11:00:29 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OX8005VZRSOD560@eusync2.samsung.com>; Tue, 03 Oct 2017 11:00:29 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 1/9] clk: samsung: Remove support for obsolete Exynos4212 CPU clock Date: Tue, 03 Oct 2017 12:00:08 +0200 Message-id: <20171003100016.32029-2-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWy7djP87p74y9HGnS1KFpsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DKWNdqWfBJrKJrziXWBsY+4S5GTg4JAROJ0zt3skLYYhIX7q1n62Lk4hASWMoocfLB DEYI5zOjxP2HzxlhOp7OPsAMkVjGKLFp3W2olgYmiX0blrOAVLEJGEp0ve1iA7FFBBwkPn96 DTaKWeApo8SJQ8+Zuhg5OIQFQiU+/CgHqWERUJVY8fg02AZeAVuJ5wtPMkFsk5d4v+A+WJxT wE5i8cflrCBzJAQa2SSmf14DdbiLxKOGXjYIW1ji1fEt7BC2jERnx0GoQf2MEk2t2hD2DEaJ c295IWxricPHL4LNYRbgk5i0bTozyG0SArwSHW1CECUeErten4Ya6Six/cFKaLBMZJSYeriF fQKj9AJGhlWMIqmlxbnpqcWmesWJucWleel6yfm5mxiBUXn63/GvOxiXHrM6xCjAwajEw7vD 41KkEGtiWXFl7iFGCQ5mJRHeaV6XI4V4UxIrq1KL8uOLSnNSiw8xSnOwKInz2ka1RQoJpCeW pGanphakFsFkmTg4pRoYfZYbfRRxZmsq6/ilNmV/peROnr1NFgm7tn+VeZh6piTW2/vBtrN7 rSTsNk3Z/lVcdpn1/AvlqjGhaf2ZT287eTWwbb6dLtldk7qjXMHo+wzdo7VF+gdnxYvyaNQ6 ijA3+y78v375acaDfC8zE9Yb9fXbxZ/8OmWK4sOO/MpfbZ6XOP+IL2JQYinOSDTUYi4qTgQA NViL8sYCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Fd298ZcjDQ72clhsnLGe1eL6l+es FufPb2C3+Nhzj9Vixvl9TBZrj9xltzj8pp3Vgd1j06pONo++LasYPT5vkgtgjuKySUnNySxL LdK3S+DKWNdqWfBJrKJrziXWBsY+4S5GTg4JAROJp7MPMEPYYhIX7q1n62Lk4hASWMIo0Xrn GyuE08QkserFcSaQKjYBQ4mut11sILaIgIPE50+vGUGKmAWeMkocfzuVBSQhLBAq8ePgK7AG FgFViRWPTzOC2LwCthLPF55kglgnL/F+wX2wOKeAncTij8tZQWwhoJrG+auYJzDyLmBkWMUo klpanJueW2yoV5yYW1yal66XnJ+7iREYQNuO/dy8g/HSxuBDjAIcjEo8vDs8LkUKsSaWFVfm HmKU4GBWEuGd5nU5Uog3JbGyKrUoP76oNCe1+BCjNAeLkjhv757VkUIC6YklqdmpqQWpRTBZ Jg5OqQZG1ZimIL6fZ+pDb4ZNeiRjZXHz4/P8pnzvVhNN67nb69evzyqp9b73eK+HsZ/vlqny E2a9uVQscexDj613/gTFBIOgUx5tD/5tdBb9HLdnp9Kb+xzXlot9lTh1dDFzfk7Uxh67Hykf pj07tqu/RillV4TV/YeJ7u8VK9rfSpV2Ws1dK3Y7Q61GiaU4I9FQi7moOBEA9iZGERwCAAA= X-CMS-MailID: 20171003100029eucas1p2c706e911f316a58f35be7c443824f07c X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100029eucas1p2c706e911f316a58f35be7c443824f07c X-RootMTR: 20171003100029eucas1p2c706e911f316a58f35be7c443824f07c References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Support for Exynos 4212 SoC has been removed by commit bca9085e0ae9 ("ARM: dts: exynos: remove Exynos4212 support (dead code)"), so there is no need to keep dead code. Signed-off-by: Marek Szyprowski Acked-by: Chanwoo Choi Acked-by: Krzysztof Kozlowski --- drivers/clk/samsung/clk-exynos4.c | 33 ++++----------------------------- 1 file changed, 4 insertions(+), 29 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index e40b77583c47..9a51ce9a658f 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -1401,24 +1401,6 @@ static const struct exynos_cpuclk_cfg_data e4210_armclk_d[] __initconst = { { 0 }, }; -static const struct exynos_cpuclk_cfg_data e4212_armclk_d[] __initconst = { - { 1500000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4210_CPU_DIV1(2, 6), }, - { 1400000, E4210_CPU_DIV0(2, 1, 6, 0, 7, 3), E4210_CPU_DIV1(2, 6), }, - { 1300000, E4210_CPU_DIV0(2, 1, 5, 0, 7, 3), E4210_CPU_DIV1(2, 5), }, - { 1200000, E4210_CPU_DIV0(2, 1, 5, 0, 7, 3), E4210_CPU_DIV1(2, 5), }, - { 1100000, E4210_CPU_DIV0(2, 1, 4, 0, 6, 3), E4210_CPU_DIV1(2, 4), }, - { 1000000, E4210_CPU_DIV0(1, 1, 4, 0, 5, 2), E4210_CPU_DIV1(2, 4), }, - { 900000, E4210_CPU_DIV0(1, 1, 3, 0, 5, 2), E4210_CPU_DIV1(2, 3), }, - { 800000, E4210_CPU_DIV0(1, 1, 3, 0, 5, 2), E4210_CPU_DIV1(2, 3), }, - { 700000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 600000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 500000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 400000, E4210_CPU_DIV0(1, 1, 3, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 300000, E4210_CPU_DIV0(1, 1, 2, 0, 4, 2), E4210_CPU_DIV1(2, 3), }, - { 200000, E4210_CPU_DIV0(1, 1, 1, 0, 3, 1), E4210_CPU_DIV1(2, 3), }, - { 0 }, -}; - #define E4412_CPU_DIV1(cores, hpm, copy) \ (((cores) << 8) | ((hpm) << 4) | ((copy) << 0)) @@ -1533,17 +1515,10 @@ static void __init exynos4_clk_init(struct device_node *np, samsung_clk_register_fixed_factor(ctx, exynos4x12_fixed_factor_clks, ARRAY_SIZE(exynos4x12_fixed_factor_clks)); - if (of_machine_is_compatible("samsung,exynos4412")) { - exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", - mout_core_p4x12[0], mout_core_p4x12[1], 0x14200, - e4412_armclk_d, ARRAY_SIZE(e4412_armclk_d), - CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); - } else { - exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", - mout_core_p4x12[0], mout_core_p4x12[1], 0x14200, - e4212_armclk_d, ARRAY_SIZE(e4212_armclk_d), - CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); - } + exynos_register_cpu_clock(ctx, CLK_ARM_CLK, "armclk", + mout_core_p4x12[0], mout_core_p4x12[1], 0x14200, + e4412_armclk_d, ARRAY_SIZE(e4412_armclk_d), + CLK_CPU_NEEDS_DEBUG_ALT_DIV | CLK_CPU_HAS_DIV1); } samsung_clk_register_alias(ctx, exynos4_aliases,