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Tue, 3 Oct 2017 10:00:30 +0000 (GMT) X-AuditID: cbfec7f5-f79d06d0000031c7-3b-59d35fbe5c25 Received: from eusync2.samsung.com ( [203.254.199.212]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id E0.A1.18832.EBF53D95; Tue, 3 Oct 2017 11:00:30 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OX8005VZRSOD560@eusync2.samsung.com>; Tue, 03 Oct 2017 11:00:30 +0100 (BST) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH 4/9] clk: samsung: Remove clkdev alias support in Exynos5250 clk driver Date: Tue, 03 Oct 2017 12:00:11 +0200 Message-id: <20171003100016.32029-5-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.14.2 In-reply-to: <20171003100016.32029-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrMIsWRmVeSWpSXmKPExsWy7djP87r74y9HGszoZbLYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CV0Xx+DlvBdqGKq783szYwbuDvYuTkkBAwkZi6bzUzhC0mceHeerYuRi4OIYGljBKz 78xkhnA+M0osn7IFyOEA67h8ShAivoxRYvq/DhYIp4FJ4tmcK0wgo9gEDCW63naxgdgiAg4S nz+9ZgQpYhZ4yihx4tBzsCJhgUiJjR//s4DYLAKqEmtf7mUHsXkFbCUWTbrFDnGTvMT7BfcZ QWxOATuJxR+Xs0LEO9gk/r4QhbBdJOZ3bICKC0u8Or4FqldGorPjIBOE3c8o0dSqDWHPYJQ4 95YXwraWOHz8IlgvswCfxKRt06G+5JXoaBOCKPGQ2NjZCA0iR4kDc1cyQjw8kVFi2/bt7BMY pRcwMqxiFEktLc5NTy021StOzC0uzUvXS87P3cQIjMrT/45/3cG49JjVIUYBDkYlHt4dHpci hVgTy4orcw8xSnAwK4nwTvO6HCnEm5JYWZValB9fVJqTWnyIUZqDRUmc1zaqLVJIID2xJDU7 NbUgtQgmy8TBKdXAuI3z4P49bx6qbQte1x+uqD+786xngfCT/WHLXZinB17/t8r6QEHTbN3F X3Njs75tDZW9qyT0c/sZo9lnPjSaK57z/XiBYZJCmN6OpZXmon+ee36Ly1ifr/kg4+G+w0m5 hRdjOtJvfNg//VhMoED0lPfFOjm6MzwOZf1/7SJVljttw7M5H2tMJiqxFGckGmoxFxUnAgAg FFS1xgIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkluLIzCtJLcpLzFFi42I5/e/4Fd198ZcjDQ6eE7DYOGM9q8X1L89Z Lc6f38Bu8bHnHqvFjPP7mCzWHrnLbnH4TTurA7vHplWdbB59W1YxenzeJBfAHMVlk5Kak1mW WqRvl8CV0Xx+DlvBdqGKq783szYwbuDvYuTgkBAwkbh8SrCLkRPIFJO4cG89WxcjF4eQwBJG icXPr0I5TUwSj9d9YgWpYhMwlOh628UGYosIOEh8/vSaEaSIWeApo8Txt1NZQBLCApESGz/+ B7NZBFQl1r7cyw5i8wrYSiyadIsdYp28xPsF9xlBbE4BO4nFH5eDLRACqmmcv4p5AiPvAkaG VYwiqaXFuem5xYZ6xYm5xaV56XrJ+bmbGIEBtO3Yz807GC9tDD7EKMDBqMTDu8PjUqQQa2JZ cWXuIUYJDmYlEd5pXpcjhXhTEiurUovy44tKc1KLDzFKc7AoifP27lkdKSSQnliSmp2aWpBa BJNl4uCUamCUXD257f+ztRkf95+bcIFvXeOUH6k/M+rUnW8q/oiJ1lXjj/yWpP6r3LK6fvbb NYscOnq3VjuWZvTn98VG/khgcSor+B+R2ar+xvq43VLlMLYEz0SXsKSupxZXF1+cv6xWgfGD U8qy4kOG7P5O8bumH05bfWf25I3v1inOXFrQ/cV00pOg09pKLMUZiYZazEXFiQBgWLwYHAIA AA== X-CMS-MailID: 20171003100030eucas1p1b47a46931ca138eb92d4950f44f6f737 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRs=?= =?UTF-8?B?7IK87ISx7KCE7J6QG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?TWFyZWsgU3p5cHJvd3NraRtTUlBPTC1LZXJuZWwgKFRQKRtT?= =?UTF-8?B?YW1zdW5nIEVsZWN0cm9uaWNzG1NlbmlvciBTb2Z0d2FyZSBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG0VIURtDMTBDRDAyQ0QwMjczOTI=?= CMS-TYPE: 201P X-CMS-RootMailID: 20171003100030eucas1p1b47a46931ca138eb92d4950f44f6f737 X-RootMTR: 20171003100030eucas1p1b47a46931ca138eb92d4950f44f6f737 References: <20171003100016.32029-1-m.szyprowski@samsung.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP All Exynos5250 boards have been fully converted to device-tree and use generic dt-based CPUfreq driver, so there is no need to create any clkdev aliases for the clocks. Drop all the code related to aliases handling. Signed-off-by: Marek Szyprowski Acked-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynos5250.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 27a227d6620c..9b073c98a891 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -293,14 +293,14 @@ static const struct samsung_mux_clock exynos5250_mux_clks[] __initconst = { /* * CMU_CPU */ - MUX_FA(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, - CLK_SET_RATE_PARENT, 0, "mout_apll"), - MUX_A(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"), + MUX_F(0, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, + CLK_SET_RATE_PARENT, 0), + MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), /* * CMU_CORE */ - MUX_A(0, "mout_mpll", mout_mpll_p, SRC_CORE1, 8, 1, "mout_mpll"), + MUX(0, "mout_mpll", mout_mpll_p, SRC_CORE1, 8, 1), /* * CMU_TOP @@ -391,7 +391,7 @@ static const struct samsung_div_clock exynos5250_div_clks[] __initconst = { */ DIV(0, "div_arm", "mout_cpu", DIV_CPU0, 0, 3), DIV(0, "div_apll", "mout_apll", DIV_CPU0, 24, 3), - DIV_A(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3, "armclk"), + DIV(0, "div_arm2", "div_arm", DIV_CPU0, 28, 3), /* * CMU_TOP @@ -743,10 +743,10 @@ static const struct samsung_pll_rate_table apll_24mhz_tbl[] __initconst = { }; static struct samsung_pll_clock exynos5250_plls[nr_plls] __initdata = { - [apll] = PLL_A(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", - APLL_LOCK, APLL_CON0, "fout_apll", NULL), - [mpll] = PLL_A(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", - MPLL_LOCK, MPLL_CON0, "fout_mpll", NULL), + [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", APLL_LOCK, + APLL_CON0, NULL), + [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", MPLL_LOCK, + MPLL_CON0, NULL), [bpll] = PLL(pll_35xx, CLK_FOUT_BPLL, "fout_bpll", "fin_pll", BPLL_LOCK, BPLL_CON0, NULL), [gpll] = PLL(pll_35xx, CLK_FOUT_GPLL, "fout_gpll", "fin_pll", GPLL_LOCK,