From patchwork Thu Nov 2 06:56:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 10038063 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id AAC48603B5 for ; Thu, 2 Nov 2017 07:09:05 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9D10028E03 for ; Thu, 2 Nov 2017 07:09:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 910F828E05; Thu, 2 Nov 2017 07:09:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EF6DB28E03 for ; Thu, 2 Nov 2017 07:09:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751473AbdKBHJE (ORCPT ); Thu, 2 Nov 2017 03:09:04 -0400 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:61473 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1750836AbdKBHJE (ORCPT ); Thu, 2 Nov 2017 03:09:04 -0400 Received: from SHSQR01.spreadtrum.com (localhost [127.0.0.2] (may be forged)) by SHSQR01.spreadtrum.com with ESMTP id vA278wYT032278; Thu, 2 Nov 2017 15:08:58 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from ig2.spreadtrum.com (shmbx01.spreadtrum.com [10.0.1.203]) by SHSQR01.spreadtrum.com with ESMTP id vA272PXD015654 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 2 Nov 2017 15:02:25 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from SHCAS02.spreadtrum.com (10.0.1.202) by SHMBX01.spreadtrum.com (10.0.1.203) with Microsoft SMTP Server (TLS) id 15.0.847.32; Thu, 2 Nov 2017 15:02:26 +0800 Received: from localhost (10.0.73.143) by SHCAS02.spreadtrum.com (10.0.1.250) with Microsoft SMTP Server (TLS) id 15.0.847.32 via Frontend Transport; Thu, 2 Nov 2017 15:02:27 +0800 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: Catalin Marinas , Will Deacon , , , Arnd Bergmann , Mark Brown , Xiaolong Zhang , Ben Li , , , Orson Zhai , Chunyan Zhang Subject: [PATCH V3 05/11] clk: sprd: add mux clock support Date: Thu, 2 Nov 2017 14:56:20 +0800 Message-ID: <20171102065626.21835-6-chunyan.zhang@spreadtrum.com> X-Mailer: git-send-email 2.12.2 In-Reply-To: <20171102065626.21835-1-chunyan.zhang@spreadtrum.com> References: <20171102065626.21835-1-chunyan.zhang@spreadtrum.com> MIME-Version: 1.0 X-MAIL: SHSQR01.spreadtrum.com vA272PXD015654 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds clock multiplexor support for Spreadtrum platforms, the mux clocks also can be found in sprd composite clocks, so provides two helpers that can be reused later on. Signed-off-by: Chunyan Zhang --- drivers/clk/sprd/Makefile | 1 + drivers/clk/sprd/mux.c | 89 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/sprd/mux.h | 65 ++++++++++++++++++++++++++++++++++ 3 files changed, 155 insertions(+) create mode 100644 drivers/clk/sprd/mux.c create mode 100644 drivers/clk/sprd/mux.h diff --git a/drivers/clk/sprd/Makefile b/drivers/clk/sprd/Makefile index 8cd5592..cee36b5 100644 --- a/drivers/clk/sprd/Makefile +++ b/drivers/clk/sprd/Makefile @@ -2,3 +2,4 @@ obj-$(CONFIG_SPRD_COMMON_CLK) += clk-sprd.o clk-sprd-y += common.o clk-sprd-y += gate.o +clk-sprd-y += mux.o diff --git a/drivers/clk/sprd/mux.c b/drivers/clk/sprd/mux.c new file mode 100644 index 0000000..5a344e0 --- /dev/null +++ b/drivers/clk/sprd/mux.c @@ -0,0 +1,89 @@ +/* + * Spreadtrum multiplexer clock driver + * + * Copyright (C) 2017 Spreadtrum, Inc. + * Author: Chunyan Zhang + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include +#include +#include + +#include "mux.h" + +DEFINE_SPINLOCK(sprd_mux_lock); +EXPORT_SYMBOL_GPL(sprd_mux_lock); + +u8 sprd_mux_helper_get_parent(const struct sprd_clk_common *common, + const struct sprd_mux_internal *mux) +{ + unsigned int reg; + u8 parent; + int num_parents; + int i; + + sprd_regmap_read(common->regmap, common->reg, ®); + parent = reg >> mux->shift; + parent &= (1 << mux->width) - 1; + + if (mux->table) { + num_parents = clk_hw_get_num_parents(&common->hw); + + for (i = 0; i < num_parents; i++) + if (parent == mux->table[i] || + (i < (num_parents - 1) && parent > mux->table[i] && + parent < mux->table[i + 1])) + return i; + if (i == num_parents) + return i - 1; + } + + return parent; +} +EXPORT_SYMBOL_GPL(sprd_mux_helper_get_parent); + +static u8 sprd_mux_get_parent(struct clk_hw *hw) +{ + struct sprd_mux *cm = hw_to_sprd_mux(hw); + + return sprd_mux_helper_get_parent(&cm->common, &cm->mux); +} + +int sprd_mux_helper_set_parent(const struct sprd_clk_common *common, + const struct sprd_mux_internal *mux, + u8 index) +{ + unsigned long flags = 0; + unsigned int reg; + + if (mux->table) + index = mux->table[index]; + + spin_lock_irqsave(common->lock, flags); + + sprd_regmap_read(common->regmap, common->reg, ®); + reg &= ~GENMASK(mux->width + mux->shift - 1, mux->shift); + sprd_regmap_write(common->regmap, common->reg, + reg | (index << mux->shift)); + + spin_unlock_irqrestore(common->lock, flags); + + return 0; +} +EXPORT_SYMBOL_GPL(sprd_mux_helper_set_parent); + +static int sprd_mux_set_parent(struct clk_hw *hw, u8 index) +{ + struct sprd_mux *cm = hw_to_sprd_mux(hw); + + return sprd_mux_helper_set_parent(&cm->common, &cm->mux, index); +} + +const struct clk_ops sprd_mux_ops = { + .get_parent = sprd_mux_get_parent, + .set_parent = sprd_mux_set_parent, + .determine_rate = __clk_mux_determine_rate, +}; +EXPORT_SYMBOL_GPL(sprd_mux_ops); diff --git a/drivers/clk/sprd/mux.h b/drivers/clk/sprd/mux.h new file mode 100644 index 0000000..148ca8c --- /dev/null +++ b/drivers/clk/sprd/mux.h @@ -0,0 +1,65 @@ +/* + * Spreadtrum multiplexer clock driver + * + * Copyright (C) 2017 Spreadtrum, Inc. + * Author: Chunyan Zhang + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _SPRD_MUX_H_ +#define _SPRD_MUX_H_ + +#include "common.h" + +struct sprd_mux_internal { + u8 shift; + u8 width; + const u8 *table; +}; + +struct sprd_mux { + struct sprd_mux_internal mux; + struct sprd_clk_common common; +}; + +#define _SPRD_MUX_CLK(_shift, _width, _table) \ + { \ + .shift = _shift, \ + .width = _width, \ + .table = _table, \ + } + +#define SPRD_MUX_CLK(_struct, _name, _parents, _table, \ + _reg, _shift, _width, \ + _flags) \ + struct sprd_mux _struct = { \ + .mux = _SPRD_MUX_CLK(_shift, _width, _table), \ + .common = { \ + .regmap = NULL, \ + .reg = _reg, \ + .lock = &sprd_mux_lock, \ + .hw.init = CLK_HW_INIT_PARENTS(_name, \ + _parents, \ + &sprd_mux_ops, \ + _flags), \ + } \ + } + +static inline struct sprd_mux *hw_to_sprd_mux(const struct clk_hw *hw) +{ + struct sprd_clk_common *common = hw_to_sprd_clk_common(hw); + + return container_of(common, struct sprd_mux, common); +} + +extern const struct clk_ops sprd_mux_ops; +extern spinlock_t sprd_mux_lock; + +u8 sprd_mux_helper_get_parent(const struct sprd_clk_common *common, + const struct sprd_mux_internal *mux); +int sprd_mux_helper_set_parent(const struct sprd_clk_common *common, + const struct sprd_mux_internal *mux, + u8 index); + +#endif /* _SPRD_MUX_H_ */