From patchwork Thu Nov 30 13:40:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 10084947 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0AD7C6035E for ; Thu, 30 Nov 2017 13:42:21 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 00E1A29FD0 for ; Thu, 30 Nov 2017 13:42:21 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E9D9029FD4; Thu, 30 Nov 2017 13:42:20 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 78D0029FD1 for ; Thu, 30 Nov 2017 13:42:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752847AbdK3Nlx (ORCPT ); Thu, 30 Nov 2017 08:41:53 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:33377 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752359AbdK3NlB (ORCPT ); Thu, 30 Nov 2017 08:41:01 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id 40CE520749; Thu, 30 Nov 2017 14:40:59 +0100 (CET) Received: from localhost (242.171.71.37.rev.sfr.net [37.71.171.242]) by mail.free-electrons.com (Postfix) with ESMTPSA id 141DC20749; Thu, 30 Nov 2017 14:40:49 +0100 (CET) From: Gregory CLEMENT To: Stephen Boyd , Mike Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory CLEMENT , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Antoine Tenart , =?UTF-8?q?Miqu=C3=A8l=20Raynal?= , Nadav Haklai , Victor Gu , Marcin Wojtas , Wilson Ding , Hua Jing , Neta Zur Hershkovits Subject: [PATCH 1/3] clk: mvebu: armada-37xx-periph: cosmetic changes Date: Thu, 30 Nov 2017 14:40:27 +0100 Message-Id: <20171130134029.20751-2-gregory.clement@free-electrons.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20171130134029.20751-1-gregory.clement@free-electrons.com> References: <20171130134029.20751-1-gregory.clement@free-electrons.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patches fixes few cosmetic issues such as alignment, blank lines and required space. Signed-off-by: Gregory CLEMENT --- drivers/clk/mvebu/armada-37xx-periph.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c index cecb0fdfaef6..6dae21ced18a 100644 --- a/drivers/clk/mvebu/armada-37xx-periph.c +++ b/drivers/clk/mvebu/armada-37xx-periph.c @@ -79,6 +79,7 @@ static const struct clk_div_table clk_table2[] = { { .val = 1, .div = 4, }, { .val = 0, .div = 0, }, /* last entry */ }; + static const struct clk_ops clk_double_div_ops; #define PERIPH_GATE(_name, _bit) \ @@ -217,7 +218,7 @@ PERIPH_CLK_FULL(counter, 23, 20, DIV_SEL0, 23, clk_table6); PERIPH_CLK_FULL_DD(eip97, 24, 24, DIV_SEL2, DIV_SEL2, 22, 19); PERIPH_CLK_MUX_DIV(cpu, 22, DIV_SEL0, 28, clk_table6); -static struct clk_periph_data data_nb[] ={ +static struct clk_periph_data data_nb[] = { REF_CLK_FULL_DD(mmc), REF_CLK_FULL_DD(sata_host), REF_CLK_FULL_DD(sec_at), @@ -281,7 +282,7 @@ static unsigned int get_div(void __iomem *reg, int shift) } static unsigned long clk_double_div_recalc_rate(struct clk_hw *hw, - unsigned long parent_rate) + unsigned long parent_rate) { struct clk_double_div *double_div = to_clk_double_div(hw); unsigned int div; @@ -303,6 +304,7 @@ static const struct of_device_id armada_3700_periph_clock_of_match[] = { .data = data_sb, }, { } }; + static int armada_3700_add_composite_clk(const struct clk_periph_data *data, void __iomem *reg, spinlock_t *lock, struct device *dev, struct clk_hw **hw) @@ -355,9 +357,9 @@ static int armada_3700_add_composite_clk(const struct clk_periph_data *data, } *hw = clk_hw_register_composite(dev, data->name, data->parent_names, - data->num_parents, mux_hw, - mux_ops, rate_hw, rate_ops, - gate_hw, gate_ops, CLK_IGNORE_UNUSED); + data->num_parents, mux_hw, + mux_ops, rate_hw, rate_ops, + gate_hw, gate_ops, CLK_IGNORE_UNUSED); if (IS_ERR(*hw)) return PTR_ERR(*hw); @@ -406,12 +408,11 @@ static int armada_3700_periph_clock_probe(struct platform_device *pdev) if (armada_3700_add_composite_clk(&data[i], reg, &driver_data->lock, dev, hw)) dev_err(dev, "Can't register periph clock %s\n", - data[i].name); - + data[i].name); } ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, - driver_data->hw_data); + driver_data->hw_data); if (ret) { for (i = 0; i < num_periph; i++) clk_hw_unregister(driver_data->hw_data->hws[i]);