From patchwork Mon Dec 11 06:48:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yixun Lan X-Patchwork-Id: 10104317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 715CD60235 for ; Mon, 11 Dec 2017 06:50:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4EAE8294E1 for ; Mon, 11 Dec 2017 06:50:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4C7FC29488; Mon, 11 Dec 2017 06:50:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9705E29488 for ; Mon, 11 Dec 2017 06:50:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752527AbdLKGuT (ORCPT ); Mon, 11 Dec 2017 01:50:19 -0500 Received: from mail-sh2.amlogic.com ([58.32.228.45]:6425 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752449AbdLKGuR (ORCPT ); Mon, 11 Dec 2017 01:50:17 -0500 Received: from localhost.localdomain (10.18.20.164) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Mon, 11 Dec 2017 14:49:40 +0800 From: Yixun Lan To: Neil Armstrong , Jerome Brunet , Kevin Hilman CC: Rob Herring , Mark Rutland , Michael Turquette , Stephen Boyd , Carlo Caione , Yixun Lan , Qiufang Dai , Jian Hu , , , , , Subject: [PATCH v6 5/6] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC Date: Mon, 11 Dec 2017 14:48:52 +0800 Message-ID: <20171211064853.32111-6-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171211064853.32111-1-yixun.lan@amlogic.com> References: <20171211064853.32111-1-yixun.lan@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.20.164] Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Qiufang Dai Try to add Hiubus DT info, and also enable clock DT info for the Amlogic's Meson-AXG SoC. Acked-by: Rob Herring Signed-off-by: Qiufang Dai Signed-off-by: Yixun Lan --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b932a784b02a..6fe5ee0c144e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -148,6 +148,20 @@ #address-cells = <0>; }; + hiubus: bus@ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + + clkc: clock-controller@0 { + compatible = "amlogic,axg-clkc"; + #clock-cells = <1>; + reg = <0x0 0x0 0x0 0x320>; + }; + }; + mailbox: mailbox@ff63dc00 { compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; reg = <0 0xff63dc00 0 0x400>;