| Message ID | 20171211141348.22048-6-yixun.lan@amlogic.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
Yixun Lan <yixun.lan@amlogic.com> writes: > From: Qiufang Dai <qiufang.dai@amlogic.com> > > Try to add Hiubus DT info, and also enable clock DT info > for the Amlogic's Meson-AXG SoC. > > Acked-by: Rob Herring <robh@kernel.org> > Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Applied to v4.16/dt64, Thanks, Kevin > --- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > index b932a784b02a..6fe5ee0c144e 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -148,6 +148,20 @@ > #address-cells = <0>; > }; > > + hiubus: bus@ff63c000 { > + compatible = "simple-bus"; > + reg = <0x0 0xff63c000 0x0 0x1c00>; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; > + > + clkc: clock-controller@0 { > + compatible = "amlogic,axg-clkc"; > + #clock-cells = <1>; > + reg = <0x0 0x0 0x0 0x320>; > + }; > + }; > + > mailbox: mailbox@ff63dc00 { > compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; > reg = <0 0xff63dc00 0 0x400>; -- To unsubscribe from this list: send the line "unsubscribe linux-clk" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b932a784b02a..6fe5ee0c144e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -148,6 +148,20 @@ #address-cells = <0>; }; + hiubus: bus@ff63c000 { + compatible = "simple-bus"; + reg = <0x0 0xff63c000 0x0 0x1c00>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>; + + clkc: clock-controller@0 { + compatible = "amlogic,axg-clkc"; + #clock-cells = <1>; + reg = <0x0 0x0 0x0 0x320>; + }; + }; + mailbox: mailbox@ff63dc00 { compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; reg = <0 0xff63dc00 0 0x400>;