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Mon, 26 Feb 2018 12:54:05 +0000 (GMT) Received: from eucas1p1.samsung.com ( [182.198.249.206]) by eusmges3new.samsung.com (EUCPMTA) with SMTP id 27.78.10409.C63049A5; Mon, 26 Feb 2018 12:54:04 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20180226125404eucas1p235469ad425d99e51cfa4163124f66b26~W4UzA2rzn1716617166eucas1p2U; Mon, 26 Feb 2018 12:54:04 +0000 (GMT) X-AuditID: cbfec7f5-f95739c0000028a9-e2-5a94036cc8eb Received: from eusync3.samsung.com ( [203.254.199.213]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 92.0D.04183.C63049A5; Mon, 26 Feb 2018 12:54:04 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P4R0055KD5X67D0@eusync3.samsung.com>; Mon, 26 Feb 2018 12:54:04 +0000 (GMT) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Inki Dae , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH v2 6/6] ARM: dts: exynos: Remove obsolete clock properties from power domains Date: Mon, 26 Feb 2018 13:53:55 +0100 Message-id: <20180226125355.9052-7-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.15.0 In-reply-to: <20180226125355.9052-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrAIsWRmVeSWpSXmKPExsWy7djPc7o5zFOiDN6dM7TYOGM9q8X1L89Z LSbdn8Bicf78BnaLjz33WC1mnN/HZLH2yF12i8Nv2lkdODw2repk8+jbsorR4/MmuQDmKC6b lNSczLLUIn27BK6MWZeesRSsFqo4vuMRUwPjE74uRk4OCQETiSePPrF1MXJxCAmsYJTo/97C COF8ZpTY8H8XG0zV7fuTWSESyxgleqZvgnIamCRaWg+wglSxCRhKdL3tAusQEXCQ+PzpNdgo ZoE2JomzB/YzgSSEBeIl1q3aBdTAwcEioCrxrc0LJMwrYCNxemsfM8Q2eYnF33eCzeEUsJXo vDUN7D4JgUY2iWsnzkMVuUgsn34T6jxhiVfHt7BD2DISlyd3s0A09DNK/Pv/kgnCmcEosf5j K1SVtcTh4xfBzmYW4JOYtG06M8hFEgK8Eh1tQhCmh8SU/74QpqPE5hdaEA9PYJT4s2Ye0wRG qQWMDKsYxVNLi3PTU4uN81LL9YoTc4tL89L1kvNzNzEC4/H0v+NfdzDu+5N0iFGAg1GJh/fH nclRQqyJZcWVuYcYJTiYlUR4Vy4GCvGmJFZWpRblxxeV5qQWH2KU5mBREueN06iLEhJITyxJ zU5NLUgtgskycXBKNTC6ypUyPtiZ4231Z9n8aT/v7bpRzfOUZXGq5NWugDZXsay2BrXtNhrz SiXs8/j5D707M7PyZdK0kKn7Nk/dEtDSq/z/9co9b9wl7RYf3P98k9TV7CMe4qs2s/DK35jf bvqW5wLTrEffP6rrnN/XE3xpOdcOQd0I/aOfDx17/eLJ4hwFDZN9qQ8/K7EUZyQaajEXFScC AGCYC8HDAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpkluLIzCtJLcpLzFFi42I5/e/4Vd0c5ilRBttPMVlsnLGe1eL6l+es FpPuT2CxOH9+A7vFx557rBYzzu9jslh75C67xeE37awOHB6bVnWyefRtWcXo8XmTXABzFJdN SmpOZllqkb5dAlfGrEvPWApWC1Uc3/GIqYHxCV8XIyeHhICJxO37k1m7GLk4hASWMErs72xk B0kICTQxSWyfIQpiswkYSnS97WIDsUUEHCQ+f3rNCNLALNDBJLFn70OwhLBAvMTNtl9MXYwc HCwCqhLf2rxAwrwCNhKnt/YxQyyTl1j8fSdYOaeArUTnrWlsELtsJLb/28I0gZFnASPDKkaR 1NLi3PTcYiO94sTc4tK8dL3k/NxNjMCA2Xbs55YdjF3vgg8xCnAwKvHwLvg5KUqINbGsuDL3 EKMEB7OSCO/KxZOjhHhTEiurUovy44tKc1KLDzFKc7AoifOeN6iMEhJITyxJzU5NLUgtgsky cXBKNTB2d/5XWupRuEhYS8jyw4fqr59ZrcJD9e7rXZ+2nm/ZiSN2C04mxm/m8V4vPUfqwIJX bV6dtWYfH+iz3t/wbHpR2fPs34EViR+mTXq2dtPtJbN/7/+dUx87029jZGq+7zFdjePOeZOP 2a85cfkT2/boo6L2WxPXVerFJD3d4OQRE8VnWLKKX7dViaU4I9FQi7moOBEAOW8iJBQCAAA= X-CMS-MailID: 20180226125404eucas1p235469ad425d99e51cfa4163124f66b26 X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20180226125404eucas1p235469ad425d99e51cfa4163124f66b26 X-RootMTR: 20180226125404eucas1p235469ad425d99e51cfa4163124f66b26 References: <20180226125355.9052-1-m.szyprowski@samsung.com> Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Handling of special clock operations on power domain on/off sequences has been moved to respective Exynos clock controller drivers and clock properties have been marked as deprecated. Remove all clock properties from existing Exynos power domain nodes, as they are no longer used. Signed-off-by: Marek Szyprowski --- arch/arm/boot/dts/exynos5250.dtsi | 4 ---- arch/arm/boot/dts/exynos5420.dtsi | 14 -------------- 2 files changed, 18 deletions(-) diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 56626d1a4235..38f216f9f5ad 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -134,10 +134,6 @@ reg = <0x100440A0 0x20>; #power-domain-cells = <0>; label = "DISP1"; - clocks = <&clock CLK_FIN_PLL>, - <&clock CLK_MOUT_ACLK200_DISP1_SUB>, - <&clock CLK_MOUT_ACLK300_DISP1_SUB>; - clock-names = "oscclk", "clk0", "clk1"; }; pd_mau: power-domain@100440c0 { diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 2f3cb2a97f71..9672d0e51f69 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -276,10 +276,6 @@ reg = <0x10044000 0x20>; #power-domain-cells = <0>; label = "GSC"; - clocks = <&clock CLK_FIN_PLL>, - <&clock CLK_MOUT_USER_ACLK300_GSCL>, - <&clock CLK_GSCL0>, <&clock CLK_GSCL1>; - clock-names = "oscclk", "clk0", "asb0", "asb1"; }; isp_pd: power-domain@10044020 { @@ -292,10 +288,6 @@ mfc_pd: power-domain@10044060 { compatible = "samsung,exynos4210-pd"; reg = <0x10044060 0x20>; - clocks = <&clock CLK_FIN_PLL>, - <&clock CLK_MOUT_USER_ACLK333>, - <&clock CLK_ACLK333>; - clock-names = "oscclk", "clk0","asb0"; #power-domain-cells = <0>; label = "MFC"; }; @@ -312,12 +304,6 @@ reg = <0x100440C0 0x20>; #power-domain-cells = <0>; label = "DISP"; - clocks = <&clock CLK_FIN_PLL>, - <&clock CLK_MOUT_USER_ACLK200_DISP1>, - <&clock CLK_MOUT_USER_ACLK300_DISP1>, - <&clock CLK_MOUT_USER_ACLK400_DISP1>, - <&clock CLK_FIMD1>, <&clock CLK_MIXER>; - clock-names = "oscclk", "clk0", "clk1", "clk2", "asb0", "asb1"; }; mau_pd: power-domain@100440e0 {