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Tue, 13 Mar 2018 09:39:21 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges3new.samsung.com (EUCPMTA) with SMTP id 16.DC.10409.84C97AA5; Tue, 13 Mar 2018 09:39:20 +0000 (GMT) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20180313093920eucas1p206d31e1de5f30a8ad1b624527d4ccab5~bcWDkEFI31136111361eucas1p2J; Tue, 13 Mar 2018 09:39:20 +0000 (GMT) X-AuditID: cbfec7f5-f95739c0000028a9-f5-5aa79c481d08 Received: from eusync3.samsung.com ( [203.254.199.213]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 93.D9.04178.84C97AA5; Tue, 13 Mar 2018 09:39:20 +0000 (GMT) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync3.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0P5I005C6W5FDG60@eusync3.samsung.com>; Tue, 13 Mar 2018 09:39:20 +0000 (GMT) From: Marek Szyprowski To: linux-clk@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz Subject: [PATCH] clk: samsung: exynos5250: Add missing clocks for FIMC LITE SYSMMU devices Date: Tue, 13 Mar 2018 10:39:08 +0100 Message-id: <20180313093908.25389-1-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.15.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHIsWRmVeSWpSXmKPExsWy7djP87oec5ZHGZzaoGOxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEr4+eaN2wFc/grZmz6wtrA2MLbxcjJISFgItE27wgTiC0ksIJRYtupiC5GLiD7M6PE w4uT2LsYOcCKWqbXQsSXMUq86DjABuE0MEl8aVsD1s0mYCjR9baLDcQWEXCQ+PzpNSNIEbPA U0aJE4eegxUJC8RITL6xG6yIRUBV4sPnLWA2r4CtxIa9V5khTpKXWPx9J9gGCYGHrBKvph1i gki4SPxafIAFwhaWeHV8CzuELSPR2XEQqqZeou87yD8gzT2MEntbpkIlrCUOH7/ICmIzC/BJ TNo2nRniN16JjjYhiBIPiUn3D7BC2I4S93+tYIaES6zEnjlT2ScwSi5gZFjFKJ5aWpybnlps nJdarlecmFtcmpeul5yfu4kRGGun/x3/uoNx35+kQ4wCHIxKPLwGzcuihFgTy4orcw8xSnAw K4nwmvUsjxLiTUmsrEotyo8vKs1JLT7EKM3BoiTOG6dRFyUkkJ5YkpqdmlqQWgSTZeLglGpg 9GnY9HJO16oaz+2xdmeUVwcZPF3B03Nb8i9Py2d/tYrjBy3Tvz/n3p3nq+G8kHN+Qs/mU2t9 BKR4ub+r/OdlFvndq2ucwqm1fIPNrxc+U1//Wyv9e9rjCZezFlqpXCyJTdM4vyjBvHX5hHzD j8E12yVexcdVfQ+TDQjx/BFpoq1udf911sXFSizFGYmGWsxFxYkAUOtGK7ECAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCJMWRmVeSWpSXmKPExsVy+t/xq7oec5ZHGbx4wWqxccZ6VovrX56z Wpw/v4Hd4mPPPVaLGef3MVmsPXKX3eLwm3ZWB3aPTas62Tz6tqxi9Pi8SS6AOYrLJiU1J7Ms tUjfLoEr4+eaN2wFc/grZmz6wtrA2MLbxcjBISFgItEyvbaLkZNDSGAJo8TmCcVdjFxAdhOT RMeTRnaQBJuAoUTX2y42EFtEwEHi86fXjCBFzAJPGSWOv53KApIQFoiRmHxjN1gRi4CqxIfP W8BsXgFbiQ17rzKD2BIC8hKLv+9km8DItYCRYRWjSGppcW56brGhXnFibnFpXrpecn7uJkag 37cd+7l5B+OljcGHGAU4GJV4eA2al0UJsSaWFVfmHmKU4GBWEuE161keJcSbklhZlVqUH19U mpNafIhRmoNFSZz3vEFllJBAemJJanZqakFqEUyWiYNTqoHRLpf32qGFMbJx6fPEklew1asn 5twwmSrJ5FS1wPFy78Pexhn6v+vceb3V578W3SicuHqOhFvynfmlRicPRreU++3jOP0wkTmC c/Hv5hlxvs/3bklStb9Ss5DnUbvaDL87/6dcKlvx0yVV6cvuNXlHP966dG5tq+ja93X7ZBbd e/xYM24Sf2eNEktxRqKhFnNRcSIAM6Hv7/cBAAA= X-CMS-MailID: 20180313093920eucas1p206d31e1de5f30a8ad1b624527d4ccab5 X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20180313093920eucas1p206d31e1de5f30a8ad1b624527d4ccab5 X-RootMTR: 20180313093920eucas1p206d31e1de5f30a8ad1b624527d4ccab5 References: Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP FIMC LITE SYSMMU device are defined in exynos5250.dtsi, but clocks for them are not instantiated by Exynos5250 clock provider driver. Add needed definitions for those clocks to fix IOMMU probe failure: ERROR: could not get clock /soc/sysmmu@13c40000:sysmmu(0) exynos-sysmmu 13c40000.sysmmu: Failed to get device clock(s)! exynos-sysmmu: probe of 13c40000.sysmmu failed with error -38 ERROR: could not get clock /soc/sysmmu@13c50000:sysmmu(0) exynos-sysmmu 13c50000.sysmmu: Failed to get device clock(s)! exynos-sysmmu: probe of 13c50000.sysmmu failed with error -38 Signed-off-by: Marek Szyprowski Acked-by: Chanwoo Choi --- drivers/clk/samsung/clk-exynos5250.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 06e5ddcb30db..347fd80c351b 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -561,6 +561,8 @@ static const struct samsung_gate_clock exynos5250_gate_clks[] __initconst = { 0), GATE(CLK_GSCL3, "gscl3", "mout_aclk266_gscl_sub", GATE_IP_GSCL, 3, 0, 0), + GATE(CLK_CAMIF_TOP, "camif_top", "mout_aclk266_gscl_sub", + GATE_IP_GSCL, 4, 0, 0), GATE(CLK_GSCL_WA, "gscl_wa", "div_gscl_wa", GATE_IP_GSCL, 5, 0, 0), GATE(CLK_GSCL_WB, "gscl_wb", "div_gscl_wb", GATE_IP_GSCL, 6, 0, 0), GATE(CLK_SMMU_GSCL0, "smmu_gscl0", "mout_aclk266_gscl_sub", @@ -571,6 +573,10 @@ static const struct samsung_gate_clock exynos5250_gate_clks[] __initconst = { GATE_IP_GSCL, 9, 0, 0), GATE(CLK_SMMU_GSCL3, "smmu_gscl3", "mout_aclk266_gscl_sub", GATE_IP_GSCL, 10, 0, 0), + GATE(CLK_SMMU_FIMC_LITE0, "smmu_fimc_lite0", "mout_aclk266_gscl_sub", + GATE_IP_GSCL, 11, 0, 0), + GATE(CLK_SMMU_FIMC_LITE1, "smmu_fimc_lite1", "mout_aclk266_gscl_sub", + GATE_IP_GSCL, 12, 0, 0), GATE(CLK_MFC, "mfc", "mout_aclk333_sub", GATE_IP_MFC, 0, 0, 0),