From patchwork Tue Jul 3 14:57:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yixun Lan X-Patchwork-Id: 10503193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A6AE56028F for ; Tue, 3 Jul 2018 07:00:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9626428ABC for ; Tue, 3 Jul 2018 07:00:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8A5FD28AC6; Tue, 3 Jul 2018 07:00:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=2.0 tests=BAYES_00, DATE_IN_FUTURE_06_12, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3B96828ABC for ; Tue, 3 Jul 2018 07:00:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754240AbeGCHA1 (ORCPT ); Tue, 3 Jul 2018 03:00:27 -0400 Received: from mail-sh2.amlogic.com ([58.32.228.45]:11708 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753539AbeGCHAZ (ORCPT ); Tue, 3 Jul 2018 03:00:25 -0400 Received: from localhost.localdomain (10.18.20.250) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Tue, 3 Jul 2018 14:59:34 +0800 From: Yixun Lan To: Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Michael Turquette , Stephen Boyd , Rob Herring , Miquel Raynal , Boris Brezillon , Martin Blumenstingl , Liang Yang , Qiufang Dai , Jian Hu , , , , , Subject: [PATCH 1/3] clk: meson: add DT documentation for emmc clock controller Date: Tue, 3 Jul 2018 14:57:14 +0000 Message-ID: <20180703145716.31860-2-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180703145716.31860-1-yixun.lan@amlogic.com> References: <20180703145716.31860-1-yixun.lan@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.20.250] Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the EMMC sub clock controller driver, the potential consumer of this driver is EMMC or NAND. Signed-off-by: Yixun Lan --- .../bindings/clock/amlogic,emmc-clkc.txt | 45 +++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt diff --git a/Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt new file mode 100644 index 000000000000..5534bd446363 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,emmc-clkc.txt @@ -0,0 +1,45 @@ +* Amlogic EMMC Sub Clock Controller Driver + +The Amlogic EMMC clock controller generates and supplies clock to support +EMMC and NAND controller + +Required Properties: + +- compatible: should be: + "amlogic,emmc-clkc" + +- #clock-cells: should be 1. + +Two clocks are provided as the parent of this EMMC clock controller driver from +upper layer clock controller - eg "amlogic,axg-clkc" in AXG platfrom. +The main consumer of this driver is EMMC or NAND, to specify which the clock +they may consume, the preprocessor macros in the dt-bindings/clock/emmc-clkc.h +header and can be used in device tree sources. + +Parent node should have the following properties : +- compatible: "syscon", "simple-mfd, and "amlogic,emmc-clkc" +- reg: base address and size of the EMMC control register space. + +Example: Clock controller node: + +sd_emmc_c_clkc: clock-controller@7000 { + compatible = "amlogic,emmc-clkc", "syscon", "simple-mfd"; + reg = <0x0 0x7000 0x0 0x4>; + #clock-cells = <1>; + + clock-names = "clkin0", "clkin1"; + clocks = <&clkc CLKID_SD_EMMC_C_CLK0>, + <&clkc CLKID_FCLK_DIV2>; +}; + +Example: NAND controller node that consumes the clock generated by the clock + controller: + + nand: nfc@7800 { + compatible = "amlogic,meson-axg-nfc"; + reg = <0x0 0x7800 0x0 0x100>; + interrupts = ; + clocks = <&clkc CLKID_SD_EMMC_C>, + <&sd_emmc_c_clkc CLKID_EMMC_C_DIV>; + clock-names = "core", "device"; + };