From patchwork Thu Aug 9 07:07:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yixun Lan X-Patchwork-Id: 10561019 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 555B913BB for ; Thu, 9 Aug 2018 07:08:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3FFDB2A1C3 for ; Thu, 9 Aug 2018 07:08:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 336252A1D5; Thu, 9 Aug 2018 07:08:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C92B32A1D3 for ; Thu, 9 Aug 2018 07:08:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728665AbeHIJcQ (ORCPT ); Thu, 9 Aug 2018 05:32:16 -0400 Received: from mail-sh2.amlogic.com ([58.32.228.45]:46993 "EHLO mail-sh2.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725878AbeHIJcQ (ORCPT ); Thu, 9 Aug 2018 05:32:16 -0400 Received: from ofmlt.linux-actions.org (10.18.20.235) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Thu, 9 Aug 2018 15:09:00 +0800 From: Yixun Lan To: Jerome Brunet , Neil Armstrong CC: Yixun Lan , Kevin Hilman , Carlo Caione , Rob Herring , Michael Turquette , Stephen Boyd , Martin Blumenstingl , Liang Yang , Jianxin Pan , Qiufang Dai , Jian Hu , , , , , Subject: [PATCH v4 2/3] clk: meson: add DT documentation for emmc clock controller Date: Thu, 9 Aug 2018 15:07:22 +0800 Message-ID: <20180809070724.11935-3-yixun.lan@amlogic.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180809070724.11935-1-yixun.lan@amlogic.com> References: <20180809070724.11935-1-yixun.lan@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.20.235] Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Document the MMC sub clock controller driver, the potential consumer of this driver is MMC or NAND. Also add four clock bindings IDs which provided by this driver. Reviewed-by: Rob Herring Signed-off-by: Yixun Lan --- .../bindings/clock/amlogic,mmc-clkc.txt | 31 +++++++++++++++++++ include/dt-bindings/clock/amlogic,mmc-clkc.h | 17 ++++++++++ 2 files changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt create mode 100644 include/dt-bindings/clock/amlogic,mmc-clkc.h diff --git a/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt new file mode 100644 index 000000000000..9e6d34389be8 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,mmc-clkc.txt @@ -0,0 +1,31 @@ +* Amlogic MMC Sub Clock Controller Driver + +The Amlogic MMC clock controller generates and supplies clock to support +MMC and NAND controller + +Required Properties: + +- compatible: should be: + "amlogic,gx-mmc-clkc" + "amlogic,axg-mmc-clkc" + +- #clock-cells: should be 1. +- clocks: phandles to clocks corresponding to the clock-names property +- clock-names: list of parent clock names + - "clkin0", "clkin1" + +Parent node should have the following properties : +- compatible: "amlogic,axg-mmc-clkc", "syscon". +- reg: base address and size of the MMC control register space. + +Example: Clock controller node: + +sd_mmc_c_clkc: clock-controller@7000 { + compatible = "amlogic,axg-mmc-clkc", "syscon"; + reg = <0x0 0x7000 0x0 0x4>; + #clock-cells = <1>; + + clock-names = "clkin0", "clkin1"; + clocks = <&clkc CLKID_SD_MMC_C_CLK0>, + <&clkc CLKID_FCLK_DIV2>; +}; diff --git a/include/dt-bindings/clock/amlogic,mmc-clkc.h b/include/dt-bindings/clock/amlogic,mmc-clkc.h new file mode 100644 index 000000000000..162b94949119 --- /dev/null +++ b/include/dt-bindings/clock/amlogic,mmc-clkc.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Meson MMC sub clock tree IDs + * + * Copyright (c) 2018 Amlogic, Inc. All rights reserved. + * Author: Yixun Lan + */ + +#ifndef __MMC_CLKC_H +#define __MMC_CLKC_H + +#define CLKID_MMC_DIV 1 +#define CLKID_MMC_PHASE_CORE 2 +#define CLKID_MMC_PHASE_TX 3 +#define CLKID_MMC_PHASE_RX 4 + +#endif