From patchwork Fri Nov 16 12:54:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Brugger X-Patchwork-Id: 10686301 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 31C4C1709 for ; Fri, 16 Nov 2018 12:56:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 203A92CDB8 for ; Fri, 16 Nov 2018 12:56:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 11CDD2CDBA; Fri, 16 Nov 2018 12:56:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A81452CDBD for ; Fri, 16 Nov 2018 12:56:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727999AbeKPXID (ORCPT ); Fri, 16 Nov 2018 18:08:03 -0500 Received: from mail.kernel.org ([198.145.29.99]:33650 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727965AbeKPXID (ORCPT ); Fri, 16 Nov 2018 18:08:03 -0500 Received: from ziggy.de (unknown [93.176.133.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 06FF4214C1; Fri, 16 Nov 2018 12:55:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542372944; bh=Vqcv+EtdLJRUThIgc9FngtK1nOwDf3Ju81xX6aM/6tM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aHyFsb9tFs8nt0V9K4MGUEt9nAz4BztN6kNy50TC99ScIB4DNP3wnxSSV2pLgobQE lq0D+fAs+rDDoJ/eTaJGcp4qN0WwGPhTEZ1QK2j08DQOUFWW0FkYhwb5fb7Z8+WMPX jVYyqVazC3+RAPzSpZORIGb0FCZdX1YMHLuL7xc4= From: matthias.bgg@kernel.org To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@codeaurora.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com, matthias.bgg@gmail.com Cc: sean.wang@mediatek.com, sean.wang@kernel.org, rdunlap@infradead.org, wens@csie.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger Subject: [PATCH v5 04/12] drm/mediatek: Add support for mmsys through a pdev Date: Fri, 16 Nov 2018 13:54:41 +0100 Message-Id: <20181116125449.23581-5-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181116125449.23581-1-matthias.bgg@kernel.org> References: <20181116125449.23581-1-matthias.bgg@kernel.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Matthias Brugger The MMSYS subsystem includes clocks and drm components. This patch adds an initailization path through a platform device for the clock part, so that both drivers get probed from the same device tree compatible. Signed-off-by: Matthias Brugger Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 23 +++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 99dd612a6683..18fc761ba94f 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -199,6 +199,7 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .ext_path = mt2701_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), .shadow_register = true, + .clk_drv_name = "clk-mt2701-mm", }; static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { @@ -215,6 +216,7 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), .ext_path = mt8173_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), + .clk_drv_name = "clk-mt8173-mm", }; static int mtk_drm_kms_init(struct drm_device *drm) @@ -473,6 +475,24 @@ static int mtk_drm_probe(struct platform_device *pdev) if (IS_ERR(private->config_regs)) return PTR_ERR(private->config_regs); + /* + * For legacy reasons we need to probe the clock driver via + * a platfomr device. This is outdated and should not be used + * in newer SoCs. + */ + if (private->data->clk_drv_name) { + private->clk_dev = platform_device_register_data(dev, + private->data->clk_drv_name, -1, + NULL, 0); + + if (IS_ERR(private->clk_dev)) { + pr_err("failed to register %s platform device\n", + private->data->clk_drv_name); + + return PTR_ERR(private->clk_dev); + } + } + /* Iterate over sibling DISP function blocks */ for_each_child_of_node(dev->of_node->parent, node) { const struct of_device_id *of_id; @@ -577,6 +597,9 @@ static int mtk_drm_remove(struct platform_device *pdev) for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) of_node_put(private->comp_node[i]); + if (private->clk_dev) + platform_device_unregister(private->clk_dev); + return 0; } diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index ab0adbd7d4ee..515ac4cae922 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -37,11 +37,13 @@ struct mtk_mmsys_driver_data { unsigned int third_len; bool shadow_register; + const char *clk_drv_name; }; struct mtk_drm_private { struct drm_device *drm; struct device *dma_dev; + struct platform_device *clk_dev; unsigned int num_pipes;