diff mbox series

[10/14] dt-bindings: arm: sunxi: add compatible string for V3/S3/S3L SoCs

Message ID 20190312152256.35574-11-icenowy@aosc.io (mailing list archive)
State Not Applicable, archived
Headers show
Series Support for Allwinner V3/S3L and Sochip S3 | expand

Commit Message

Icenowy Zheng March 12, 2019, 3:22 p.m. UTC
Allwinner V3/V3s/S3L and SoChip S3 SoCs share the same die, but with
different package (V3 is BGA, without co-packaged DRAM, V3s is QFP,
with co-packaged DDR2, S3 is BGA, with co-packaged DDR3, S3L is BGA
pin-compatible with S3, but with co-packaged DDR2).

Add compatible strings for Allwinner V3/S3L and SoChip S3 SoCs.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
 Documentation/devicetree/bindings/arm/sunxi.txt | 3 +++
 1 file changed, 3 insertions(+)

Comments

Rob Herring (Arm) March 28, 2019, 1:29 p.m. UTC | #1
On Tue, 12 Mar 2019 23:22:52 +0800, Icenowy Zheng wrote:
> Allwinner V3/V3s/S3L and SoChip S3 SoCs share the same die, but with
> different package (V3 is BGA, without co-packaged DRAM, V3s is QFP,
> with co-packaged DDR2, S3 is BGA, with co-packaged DDR3, S3L is BGA
> pin-compatible with S3, but with co-packaged DDR2).
> 
> Add compatible strings for Allwinner V3/S3L and SoChip S3 SoCs.
> 
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
>  Documentation/devicetree/bindings/arm/sunxi.txt | 3 +++
>  1 file changed, 3 insertions(+)
> 

Reviewed-by: Rob Herring <robh@kernel.org>
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/sunxi.txt b/Documentation/devicetree/bindings/arm/sunxi.txt
index 9254cbe7d516..6de8edba5d2b 100644
--- a/Documentation/devicetree/bindings/arm/sunxi.txt
+++ b/Documentation/devicetree/bindings/arm/sunxi.txt
@@ -15,9 +15,12 @@  using one of the following compatible strings:
   allwinner,sun8i-h2-plus
   allwinner,sun8i-h3
   allwinner,sun8i-r40
+  allwinner,sun8i-s3l
   allwinner,sun8i-t3
+  allwinner,sun8i-v3
   allwinner,sun8i-v3s
   allwinner,sun9i-a80
   allwinner,sun50i-a64
   allwinner,suniv-f1c100s
   nextthing,gr8
+  sochip,s3