From patchwork Fri Aug 30 22:07:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 11124633 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7B19B14F7 for ; Fri, 30 Aug 2019 22:17:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5AB9723774 for ; Fri, 30 Aug 2019 22:17:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728333AbfH3WRJ (ORCPT ); Fri, 30 Aug 2019 18:17:09 -0400 Received: from shell.v3.sk ([90.176.6.54]:56368 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728353AbfH3WQU (ORCPT ); Fri, 30 Aug 2019 18:16:20 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 0829DD875F; Sat, 31 Aug 2019 00:09:03 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id I8nv5gzTJ_PE; Sat, 31 Aug 2019 00:08:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id A620DD87ED; Sat, 31 Aug 2019 00:08:07 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id ekOHPVBEkIA8; Sat, 31 Aug 2019 00:08:01 +0200 (CEST) Received: from belphegor.brq.redhat.com (nat-pool-brq-t.redhat.com [213.175.37.10]) by zimbra.v3.sk (Postfix) with ESMTPSA id 3DBA8D87EF; Sat, 31 Aug 2019 00:07:52 +0200 (CEST) From: Lubomir Rintel To: "To : Olof Johansson" Cc: "Cc : Rob Herring" , Mark Rutland , Thomas Gleixner , Jason Cooper , Kishon Vijay Abraham I , Russell King , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lubomir Rintel Subject: [PATCH v3 11/16] ARM: mmp: add support for MMP3 SoC Date: Sat, 31 Aug 2019 00:07:38 +0200 Message-Id: <20190830220743.439670-12-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190830220743.439670-1-lkundrak@v3.sk> References: <20190830220743.439670-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Similar to MMP2, which this patch is based on. Known differencies from MMP2 are: * Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes Hard to tell what else is different, because documentation is not available. Signed-off-by: Lubomir Rintel --- Changes since v1: - Add CONFIG_COMMON_CLK_MMP2 to streamline the Makefile rule a tiny bit. arch/arm/mach-mmp/Kconfig | 22 ++++++++++++++++++++-- arch/arm/mach-mmp/Makefile | 1 + arch/arm/mach-mmp/cputype.h | 27 +++++++++++++++++++++++++++ arch/arm/mach-mmp/mmp3.c | 29 +++++++++++++++++++++++++++++ arch/arm/mach-mmp/time.c | 3 ++- drivers/clk/Kconfig | 5 +++++ drivers/clk/mmp/Makefile | 2 +- 7 files changed, 85 insertions(+), 4 deletions(-) create mode 100644 arch/arm/mach-mmp/mmp3.c diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index 0440109e973b9..b58a03b18bdef 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig @@ -1,13 +1,13 @@ # SPDX-License-Identifier: GPL-2.0-only menuconfig ARCH_MMP - bool "Marvell PXA168/910/MMP2" + bool "Marvell PXA168/910/MMP2/MMP3" depends on ARCH_MULTI_V5 || ARCH_MULTI_V7 select GPIO_PXA select GPIOLIB select PINCTRL select PLAT_PXA help - Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. + Support for Marvell's PXA168/PXA910(MMP), MMP2, and MMP3 processor lines. if ARCH_MMP @@ -129,6 +129,24 @@ config MACH_MMP2_DT Include support for Marvell MMP2 based platforms using the device tree. +config MACH_MMP3_DT + bool "Support MMP3 (ARMv7) platforms" + depends on ARCH_MULTI_V7 + select ARM_GIC + select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP + select CACHE_L2X0 + select PINCTRL + select PINCTRL_SINGLE + select ARCH_HAS_RESET_CONTROLLER + select CPU_PJ4B + select PM_GENERIC_DOMAINS if PM + select PM_GENERIC_DOMAINS_OF if PM && OF + help + Say 'Y' here if you want to include support for platforms + with Marvell MMP3 processor, also known as PXA2128 or + Armada 620. + endmenu config CPU_PXA168 diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile index 8f267c7bc6e86..322c1c97dc900 100644 --- a/arch/arm/mach-mmp/Makefile +++ b/arch/arm/mach-mmp/Makefile @@ -34,5 +34,6 @@ obj-$(CONFIG_MACH_FLINT) += flint.o obj-$(CONFIG_MACH_MARVELL_JASPER) += jasper.o obj-$(CONFIG_MACH_MMP_DT) += mmp-dt.o obj-$(CONFIG_MACH_MMP2_DT) += mmp2-dt.o +obj-$(CONFIG_MACH_MMP3_DT) += mmp3.o obj-$(CONFIG_MACH_TETON_BGA) += teton_bga.o obj-$(CONFIG_MACH_GPLUGD) += gplugd.o diff --git a/arch/arm/mach-mmp/cputype.h b/arch/arm/mach-mmp/cputype.h index a96abcf521b4b..c3ec88983e940 100644 --- a/arch/arm/mach-mmp/cputype.h +++ b/arch/arm/mach-mmp/cputype.h @@ -18,6 +18,8 @@ * MMP2 Z0 0x560f5811 0x00F00410 * MMP2 Z1 0x560f5811 0x00E00410 * MMP2 A0 0x560f5811 0x00A0A610 + * MMP3 A0 0x562f5842 0x00A02128 + * MMP3 B0 0x562f5842 0x00B02128 */ extern unsigned int mmp_chip_id; @@ -55,4 +57,29 @@ static inline int cpu_is_mmp2(void) #define cpu_is_mmp2() (0) #endif +#ifdef CONFIG_MACH_MMP3_DT +static inline int cpu_is_mmp3(void) +{ + return (((read_cpuid_id() >> 8) & 0xff) == 0x58) && + ((mmp_chip_id & 0xffff) == 0x2128); +} + +static inline int cpu_is_mmp3_a0(void) +{ + return (cpu_is_mmp3() && + ((mmp_chip_id & 0x00ff0000) == 0x00a00000)); +} + +static inline int cpu_is_mmp3_b0(void) +{ + return (cpu_is_mmp3() && + ((mmp_chip_id & 0x00ff0000) == 0x00b00000)); +} + +#else +#define cpu_is_mmp3() (0) +#define cpu_is_mmp3_a0() (0) +#define cpu_is_mmp3_b0() (0) +#endif + #endif /* __ASM_MACH_CPUTYPE_H */ diff --git a/arch/arm/mach-mmp/mmp3.c b/arch/arm/mach-mmp/mmp3.c new file mode 100644 index 0000000000000..b0e86964f302a --- /dev/null +++ b/arch/arm/mach-mmp/mmp3.c @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Marvell MMP3 aka PXA2128 aka 88AP2128 support + * + * Copyright (C) 2019 Lubomir Rintel + */ + +#include +#include +#include +#include +#include +#include + +#include "common.h" + +static const char *const mmp3_dt_board_compat[] __initconst = { + "marvell,mmp3", + NULL, +}; + +DT_MACHINE_START(MMP2_DT, "Marvell MMP3") + .map_io = mmp2_map_io, + .dt_compat = mmp3_dt_board_compat, + .l2c_aux_val = 1 << L310_AUX_CTRL_FWA_SHIFT | + L310_AUX_CTRL_DATA_PREFETCH | + L310_AUX_CTRL_INSTR_PREFETCH, + .l2c_aux_mask = 0xc20fffff, +MACHINE_END diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 3f6fd0be00512..8f4cacbf640e9 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -155,7 +155,8 @@ static void __init timer_config(void) __raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */ - ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : + ccr &= (cpu_is_mmp2() || cpu_is_mmp3()) ? + (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3)); __raw_writel(ccr, mmp_timer_base + TMR_CCR); diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 801fa1cd03217..8bb2ac83a1fcc 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -301,6 +301,11 @@ config COMMON_CLK_STM32H7 ---help--- Support for stm32h7 SoC family clocks +config COMMON_CLK_MMP2 + def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT) + help + Support for Marvell MMP2 and MMP3 SoC clocks + config COMMON_CLK_BD718XX tristate "Clock driver for ROHM BD718x7 PMIC" depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 diff --git a/drivers/clk/mmp/Makefile b/drivers/clk/mmp/Makefile index 7bc7ac69391e3..acc141adf087c 100644 --- a/drivers/clk/mmp/Makefile +++ b/drivers/clk/mmp/Makefile @@ -8,7 +8,7 @@ obj-y += clk-apbc.o clk-apmu.o clk-frac.o clk-mix.o clk-gate.o clk.o obj-$(CONFIG_RESET_CONTROLLER) += reset.o obj-$(CONFIG_MACH_MMP_DT) += clk-of-pxa168.o clk-of-pxa910.o -obj-$(CONFIG_MACH_MMP2_DT) += clk-of-mmp2.o +obj-$(CONFIG_COMMON_CLK_MMP2) += clk-of-mmp2.o obj-$(CONFIG_CPU_PXA168) += clk-pxa168.o obj-$(CONFIG_CPU_PXA910) += clk-pxa910.o