From patchwork Sat Dec 7 22:23:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matthias Brugger X-Patchwork-Id: 11277883 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5559D139A for ; Sat, 7 Dec 2019 22:25:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 34BCF24680 for ; Sat, 7 Dec 2019 22:25:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1575757530; bh=2c1gUv8XKvS1eMqQrdyjBwQRMHyDf9x2WLP/L/N/oYk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=dsPdvcsHcklct3Ymfo7eg5HL2Se0c2V3OU9Ql1cA+9qr3rsaD696Nr1A1JQUlPMUE 8Mfo8SpHeDE2KtRfKEgcVKnJH4WrXJFrGiN0hPTdguC0AqFfpXz7Gfzlg6O857vMcO 97ZWggEp5U5WkM357detAE86JR97rrCmF5/wanns= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727139AbfLGWZ3 (ORCPT ); Sat, 7 Dec 2019 17:25:29 -0500 Received: from mail.kernel.org ([198.145.29.99]:38348 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726480AbfLGWZ2 (ORCPT ); Sat, 7 Dec 2019 17:25:28 -0500 Received: from ziggy.de (unknown [95.169.229.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1331224677; Sat, 7 Dec 2019 22:25:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1575757527; bh=2c1gUv8XKvS1eMqQrdyjBwQRMHyDf9x2WLP/L/N/oYk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ttzFH9u03f7G9wKj1dtgPYaiqaISA6clMQRw3YMAallOWXG37EZpFmxunEwlB26jH t804u5QGOOIDea4aEzZCQSQ8GbQkfGXiiNzmWTuSHw3I8+t7a4p5WmRmK06IT9DPFt 0J0v6hAFNH9iNi1tqCiI1+oqKza4Q1UWV9BbbM40= From: matthias.bgg@kernel.org To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@codeaurora.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com, enric.balletbo@collabora.com Cc: sean.wang@mediatek.com, sean.wang@kernel.org, rdunlap@infradead.org, wens@csie.org, hsinyi@chromium.org, frank-w@public-files.de, drinkcat@chromium.org, linux-media@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, mbrugger@suse.com Subject: [PATCH v6 12/12] drm/mediatek: Add support for mmsys through a pdev Date: Sat, 7 Dec 2019 23:23:49 +0100 Message-Id: <20191207222349.23161-13-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191207222349.23161-1-matthias.bgg@kernel.org> References: <20191207222349.23161-1-matthias.bgg@kernel.org> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Matthias Brugger The MMSYS subsystem includes clocks and drm components. This patch adds an initailization path through a platform device for the clock part, so that both drivers get probed from the same device tree compatible. Signed-off-by: Matthias Brugger --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 ++ 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index 210455e9f46c..5ada74d8d0c9 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -186,6 +186,7 @@ static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = { .ext_path = mt2701_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt2701_mtk_ddp_ext), .shadow_register = true, + .clk_drv_name = "clk-mt2701-mm", }; static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { @@ -195,6 +196,7 @@ static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = { .ext_len = ARRAY_SIZE(mt2712_mtk_ddp_ext), .third_path = mt2712_mtk_ddp_third, .third_len = ARRAY_SIZE(mt2712_mtk_ddp_third), + .clk_drv_name = "clk-mt2712-mm", }; static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { @@ -202,6 +204,7 @@ static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = { .main_len = ARRAY_SIZE(mt8173_mtk_ddp_main), .ext_path = mt8173_mtk_ddp_ext, .ext_len = ARRAY_SIZE(mt8173_mtk_ddp_ext), + .clk_drv_name = "clk-mt8173-mm", }; static int mtk_drm_kms_init(struct drm_device *drm) @@ -499,6 +502,24 @@ static int mtk_drm_probe(struct platform_device *pdev) INIT_WORK(&private->commit.work, mtk_atomic_work); private->data = of_device_get_match_data(dev); + /* + * MMSYS includes apart from components management a block providing + * clocks for the subsystem. We probe this clock driver via a platform + * device. + */ + if (private->data->clk_drv_name) { + private->clk_dev = platform_device_register_data(dev, + private->data->clk_drv_name, -1, + NULL, 0); + + if (IS_ERR(private->clk_dev)) { + dev_err(dev, "failed to register %s platform device\n", + private->data->clk_drv_name); + + return PTR_ERR(private->clk_dev); + } + } + private->config_regs = syscon_node_to_regmap(dev->of_node); if (IS_ERR(private->config_regs)) return PTR_ERR(private->config_regs); @@ -605,6 +626,9 @@ static int mtk_drm_remove(struct platform_device *pdev) for (i = 0; i < DDP_COMPONENT_ID_MAX; i++) of_node_put(private->comp_node[i]); + if (private->clk_dev) + platform_device_unregister(private->clk_dev); + return 0; } diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index 63a121577dcb..8fe9136adc38 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -29,11 +29,13 @@ struct mtk_mmsys_driver_data { unsigned int third_len; bool shadow_register; + const char *clk_drv_name; }; struct mtk_drm_private { struct drm_device *drm; struct device *dma_dev; + struct platform_device *clk_dev; unsigned int num_pipes;