| Message ID | 20200310152003.2945170-3-thierry.reding@gmail.com (mailing list archive) |
|---|---|
| State | Superseded, archived |
| Headers | show |
| Series | Add EMC scaling support for Tegra210 | expand |
10.03.2020 18:19, Thierry Reding пишет: > From: Joseph Lo <josephl@nvidia.com> > > Export functions to allow accessing the CAR register required by EMC > clock scaling. These functions will be used to access the CAR register > as part of the scaling sequence. > > Signed-off-by: Joseph Lo <josephl@nvidia.com> > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > Changes in v5: > - remove tegra210_clk_emc_update_setting() which is no longer needed > ... > +EXPORT_SYMBOL_GPL(tegra210_clk_emc_update_setting); ... > +extern void tegra210_clk_emc_dll_enable(bool flag); > +extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); > +extern void tegra210_clk_emc_update_setting(u32 emc_src_value); Why these exports are needed given that the EMC driver is built-in?
10.03.2020 19:13, Dmitry Osipenko пишет: > 10.03.2020 18:19, Thierry Reding пишет: >> From: Joseph Lo <josephl@nvidia.com> >> >> Export functions to allow accessing the CAR register required by EMC >> clock scaling. These functions will be used to access the CAR register >> as part of the scaling sequence. >> >> Signed-off-by: Joseph Lo <josephl@nvidia.com> >> Signed-off-by: Thierry Reding <treding@nvidia.com> >> --- >> Changes in v5: >> - remove tegra210_clk_emc_update_setting() which is no longer needed >> > ... >> +EXPORT_SYMBOL_GPL(tegra210_clk_emc_update_setting); > ... >> +extern void tegra210_clk_emc_dll_enable(bool flag); >> +extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); >> +extern void tegra210_clk_emc_update_setting(u32 emc_src_value); > > Why these exports are needed given that the EMC driver is built-in? > Also, seems changelog doesn't match the patch itself.
On Tue, Mar 10, 2020 at 07:13:25PM +0300, Dmitry Osipenko wrote: > 10.03.2020 18:19, Thierry Reding пишет: > > From: Joseph Lo <josephl@nvidia.com> > > > > Export functions to allow accessing the CAR register required by EMC > > clock scaling. These functions will be used to access the CAR register > > as part of the scaling sequence. > > > > Signed-off-by: Joseph Lo <josephl@nvidia.com> > > Signed-off-by: Thierry Reding <treding@nvidia.com> > > --- > > Changes in v5: > > - remove tegra210_clk_emc_update_setting() which is no longer needed > > > ... > > +EXPORT_SYMBOL_GPL(tegra210_clk_emc_update_setting); > ... > > +extern void tegra210_clk_emc_dll_enable(bool flag); > > +extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); > > +extern void tegra210_clk_emc_update_setting(u32 emc_src_value); > > Why these exports are needed given that the EMC driver is built-in? Let me try if I can make the driver tristate. Given that it's fairly large it may be better to keep that as an option. Thierry
On Tue, Mar 10, 2020 at 07:16:15PM +0300, Dmitry Osipenko wrote: > 10.03.2020 19:13, Dmitry Osipenko пишет: > > 10.03.2020 18:19, Thierry Reding пишет: > >> From: Joseph Lo <josephl@nvidia.com> > >> > >> Export functions to allow accessing the CAR register required by EMC > >> clock scaling. These functions will be used to access the CAR register > >> as part of the scaling sequence. > >> > >> Signed-off-by: Joseph Lo <josephl@nvidia.com> > >> Signed-off-by: Thierry Reding <treding@nvidia.com> > >> --- > >> Changes in v5: > >> - remove tegra210_clk_emc_update_setting() which is no longer needed > >> > > ... > >> +EXPORT_SYMBOL_GPL(tegra210_clk_emc_update_setting); > > ... > >> +extern void tegra210_clk_emc_dll_enable(bool flag); > >> +extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); > >> +extern void tegra210_clk_emc_update_setting(u32 emc_src_value); > > > > Why these exports are needed given that the EMC driver is built-in? > > > > Also, seems changelog doesn't match the patch itself. I don't understand. These functions access the EMC clock's registers in the CAR. Oh... are you referring to tegra210_clk_emc_update_setting() specifically? Yes, it looks like I forgot to remove the implementation for it. I only removed the prototype. Thierry
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index f99647b4a71f..0a5be781da60 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -37,6 +37,7 @@ #define CLK_SOURCE_LA 0x1f8 #define CLK_SOURCE_SDMMC2 0x154 #define CLK_SOURCE_SDMMC4 0x164 +#define CLK_SOURCE_EMC_DLL 0x664 #define PLLC_BASE 0x80 #define PLLC_OUT 0x84 @@ -227,6 +228,10 @@ #define RST_DFLL_DVCO 0x2f4 #define DVFS_DFLL_RESET_SHIFT 0 +#define CLK_RST_CONTROLLER_CLK_OUT_ENB_X_SET 0x284 +#define CLK_RST_CONTROLLER_CLK_OUT_ENB_X_CLR 0x288 +#define CLK_OUT_ENB_X_CLK_ENB_EMC_DLL BIT(14) + #define CLK_RST_CONTROLLER_RST_DEV_Y_SET 0x2a8 #define CLK_RST_CONTROLLER_RST_DEV_Y_CLR 0x2ac #define CPU_SOFTRST_CTRL 0x380 @@ -555,6 +560,27 @@ void tegra210_set_sata_pll_seq_sw(bool state) } EXPORT_SYMBOL_GPL(tegra210_set_sata_pll_seq_sw); +void tegra210_clk_emc_dll_enable(bool flag) +{ + u32 offset = flag ? CLK_RST_CONTROLLER_CLK_OUT_ENB_X_SET : + CLK_RST_CONTROLLER_CLK_OUT_ENB_X_CLR; + + writel_relaxed(CLK_OUT_ENB_X_CLK_ENB_EMC_DLL, clk_base + offset); +} +EXPORT_SYMBOL_GPL(tegra210_clk_emc_dll_enable); + +void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value) +{ + writel_relaxed(emc_dll_src_value, clk_base + CLK_SOURCE_EMC_DLL); +} +EXPORT_SYMBOL_GPL(tegra210_clk_emc_dll_update_setting); + +void tegra210_clk_emc_update_setting(u32 emc_src_value) +{ + writel_relaxed(emc_src_value, clk_base + CLK_SOURCE_EMC); +} +EXPORT_SYMBOL_GPL(tegra210_clk_emc_update_setting); + static void tegra210_generic_mbist_war(struct tegra210_domain_mbist_war *mbist) { u32 val; diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h index 2b1b35240074..5b0bdb413460 100644 --- a/include/linux/clk/tegra.h +++ b/include/linux/clk/tegra.h @@ -131,6 +131,9 @@ extern void tegra210_set_sata_pll_seq_sw(bool state); extern void tegra210_put_utmipll_in_iddq(void); extern void tegra210_put_utmipll_out_iddq(void); extern int tegra210_clk_handle_mbist_war(unsigned int id); +extern void tegra210_clk_emc_dll_enable(bool flag); +extern void tegra210_clk_emc_dll_update_setting(u32 emc_dll_src_value); +extern void tegra210_clk_emc_update_setting(u32 emc_src_value); struct clk;