From patchwork Tue Apr 14 03:33:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 11486627 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E140E1392 for ; Tue, 14 Apr 2020 03:33:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C97CD20644 for ; Tue, 14 Apr 2020 03:33:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iVj3ydEA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404811AbgDNDd4 (ORCPT ); Mon, 13 Apr 2020 23:33:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2404802AbgDNDdu (ORCPT ); Mon, 13 Apr 2020 23:33:50 -0400 Received: from mail-pg1-x543.google.com (mail-pg1-x543.google.com [IPv6:2607:f8b0:4864:20::543]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D1BEC0A3BDC; Mon, 13 Apr 2020 20:33:50 -0700 (PDT) Received: by mail-pg1-x543.google.com with SMTP id r4so5417338pgg.4; Mon, 13 Apr 2020 20:33:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cqkf7LycevmgLpVmZeBhW8pIulT8kk5Dc9E7315h7UE=; b=iVj3ydEAh62CBoXht/+aCOXhTYwDNNjnDe8lhYUYSTLwZ3LxeEis04wto1rgkhSlqW y1P2YjAtSwKkjjRRWTSI/ioYWE4LHNoG5PysOhGTkFbBP7RwgzBDbAMjMOKJ9n1FeqjZ b8ctz0UsvKDI3yl7lXuNwoVXDXHv/dTyEwpnuRB87YMIcchpYJfUnnipzL4eRz4xS21B 61jRmdLVjsFqed24Wz31wb7p9uCnjN8eAN5ewfQ27nUH/HeZ9d3gEz5aRmK3Nc+rGdqb XdH+mzOKu6aztqb1i6rMGiyrvHgyUw8rVdtF1k8DwlHUS2xk1YcM3XzFoaGvBqDQ/a3k K29w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cqkf7LycevmgLpVmZeBhW8pIulT8kk5Dc9E7315h7UE=; b=axHrTbHCVOgq7uh98p96Cm9LY0G1yH55HFSnEJlXTXFT3BfPuOTWE/tZWcF4eDskg0 56YftB2MyL3E5FuSCRoLblbrZyUo/oACN2pLNjWv0+rifS5pfBshKtngc0tsN5rKIgPo 5KBsn8oUalcfJ1NEWxrwUqx1gLbq9GQS3+ug9CMlLnE5DhwB+UhAApnBep1pN9p2bEze 7Nb+gC0T3UmeQ3nAgigCaG9kUFKzZ7SSO4yBnijTEnI7DO7bA+up44RH19422XJrdqba +EWGJxFjddemPxFyoqb2jt4EbYR+jEaATB0Kp2Nk77lcYcvxiJ6O/Opnzc6e+RNsZt2Q 2ZNQ== X-Gm-Message-State: AGi0Pub+95lwmRGJ9Wi06u55ZPCrEylsffUFnGb+cpRoq5W+55HUaEoN X5f2kwvICnLzAW8VlMT0wPE= X-Google-Smtp-Source: APiQypIJziMZE+6YUsFjdE6JClcRXH7crwIdbG3eyClM6w5FDgQJQmSKAjEX7nGKilsRcmRUdNaCdg== X-Received: by 2002:a63:eb15:: with SMTP id t21mr19840234pgh.279.1586835229655; Mon, 13 Apr 2020 20:33:49 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id 140sm5612440pge.49.2020.04.13.20.33.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Apr 2020 20:33:49 -0700 (PDT) From: zhang.lyra@gmail.com To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Chunyan Zhang , Chunyan Zhang Subject: [PATCH v2 4/4] clk: sprd: add mipi_csi_xx gate clocks Date: Tue, 14 Apr 2020 11:33:25 +0800 Message-Id: <20200414033325.26536-5-zhang.lyra@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200414033325.26536-1-zhang.lyra@gmail.com> References: <20200414033325.26536-1-zhang.lyra@gmail.com> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org From: Chunyan Zhang mipi_csi_xx clocks are used by camera sensors. Signed-off-by: Chunyan Zhang --- drivers/clk/sprd/sc9863a-clk.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/clk/sprd/sc9863a-clk.c b/drivers/clk/sprd/sc9863a-clk.c index a0631f7756cf..f67bd08f225c 100644 --- a/drivers/clk/sprd/sc9863a-clk.c +++ b/drivers/clk/sprd/sc9863a-clk.c @@ -1615,6 +1615,36 @@ static const struct sprd_clk_desc sc9863a_mm_gate_desc = { .hw_clks = &sc9863a_mm_gate_hws, }; +/* camera sensor clocks */ +static SPRD_GATE_CLK_HW(mipi_csi_clk, "mipi-csi-clk", &mahb_ckg_eb.common.hw, + 0x20, BIT(16), 0, SPRD_GATE_NON_AON); +static SPRD_GATE_CLK_HW(mipi_csi_s_clk, "mipi-csi-s-clk", &mahb_ckg_eb.common.hw, + 0x24, BIT(16), 0, SPRD_GATE_NON_AON); +static SPRD_GATE_CLK_HW(mipi_csi_m_clk, "mipi-csi-m-clk", &mahb_ckg_eb.common.hw, + 0x28, BIT(16), 0, SPRD_GATE_NON_AON); + +static struct sprd_clk_common *sc9863a_mm_clk_clks[] = { + /* address base is 0x60900000 */ + &mipi_csi_clk.common, + &mipi_csi_s_clk.common, + &mipi_csi_m_clk.common, +}; + +static struct clk_hw_onecell_data sc9863a_mm_clk_hws = { + .hws = { + [CLK_MIPI_CSI] = &mipi_csi_clk.common.hw, + [CLK_MIPI_CSI_S] = &mipi_csi_s_clk.common.hw, + [CLK_MIPI_CSI_M] = &mipi_csi_m_clk.common.hw, + }, + .num = CLK_MM_CLK_NUM, +}; + +static const struct sprd_clk_desc sc9863a_mm_clk_desc = { + .clk_clks = sc9863a_mm_clk_clks, + .num_clk_clks = ARRAY_SIZE(sc9863a_mm_clk_clks), + .hw_clks = &sc9863a_mm_clk_hws, +}; + static SPRD_SC_GATE_CLK_FW_NAME(sim0_eb, "sim0-eb", "ext-26m", 0x0, 0x1000, BIT(0), 0, 0); static SPRD_SC_GATE_CLK_FW_NAME(iis0_eb, "iis0-eb", "ext-26m", 0x0, @@ -1737,6 +1767,8 @@ static const struct of_device_id sprd_sc9863a_clk_ids[] = { .data = &sc9863a_aonapb_gate_desc }, { .compatible = "sprd,sc9863a-mm-gate", /* 0x60800000 */ .data = &sc9863a_mm_gate_desc }, + { .compatible = "sprd,sc9863a-mm-clk", /* 0x60900000 */ + .data = &sc9863a_mm_clk_desc }, { .compatible = "sprd,sc9863a-apapb-gate", /* 0x71300000 */ .data = &sc9863a_apapb_gate_desc }, { }