From patchwork Thu Sep 3 01:50:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 11752169 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 70EF8138A for ; Thu, 3 Sep 2020 01:51:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 598FD2072A for ; Thu, 3 Sep 2020 01:51:30 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="YEqwU/C2" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726947AbgICBva (ORCPT ); Wed, 2 Sep 2020 21:51:30 -0400 Received: from crapouillou.net ([89.234.176.41]:47958 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726177AbgICBv3 (ORCPT ); Wed, 2 Sep 2020 21:51:29 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1599097860; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=UIG4jiWjH+rBhh8d5jjI9SW/ilDkObyn2SfYZpymXII=; b=YEqwU/C2s/AUhkh3zikP0PI9p4us/M2QQpEhIv2p9YuU/lm1x2ImGLWtFM8td8iH4hOrdT DlriEC5LZQEGvfy+XKAurnC8XAHxHiZ51174FGmX8hvYlEYuaCql4gL6RkXXJwacfYZP2R 65fBUDdecTZCR0tBefysKTckawFOIJ8= From: Paul Cercueil To: Michael Turquette , Stephen Boyd Cc: od@zcrc.me, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH 5/5] clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate Date: Thu, 3 Sep 2020 03:50:48 +0200 Message-Id: <20200903015048.3091523-5-paul@crapouillou.net> In-Reply-To: <20200903015048.3091523-1-paul@crapouillou.net> References: <20200903015048.3091523-1-paul@crapouillou.net> MIME-Version: 1.0 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Clocks that don't have a divider are in our case all marked with the CLK_SET_RATE_PARENT flag. In this case, the .round_rate implementation should modify the value pointed to by parent_rate, in order to propagate the rate change to the parent, as explained in the documentation of clk_set_rate(). Signed-off-by: Paul Cercueil --- drivers/clk/ingenic/cgu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c index a1a4f1adaa3a..dac6edc670cc 100644 --- a/drivers/clk/ingenic/cgu.c +++ b/drivers/clk/ingenic/cgu.c @@ -445,6 +445,8 @@ ingenic_clk_round_rate(struct clk_hw *hw, unsigned long req_rate, div = ingenic_clk_calc_div(clk_info, *parent_rate, req_rate); else if (clk_info->type & CGU_CLK_FIXDIV) div = clk_info->fixdiv.div; + else if (clk_hw_can_set_rate_parent(hw)) + *parent_rate = req_rate; return DIV_ROUND_UP(*parent_rate, div); }