| Message ID | 20210514192218.13022-11-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | Add new Renesas RZ/G2L SoC and Renesas RZ/G2L SMARC EVK support | expand |
Hi Prabhakar, On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> wrote: > From: Biju Das <biju.das.jz@bp.renesas.com> > > Add serial support for RZ/G2L SoC with earlycon and > extended mode register support. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Thanks for your patch! > --- a/drivers/tty/serial/sh-sci.c > +++ b/drivers/tty/serial/sh-sci.c > @@ -306,6 +306,7 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = { > [SCFDR] = { 0x0E, 16 }, > [SCSPTR] = { 0x10, 16 }, > [SCLSR] = { 0x12, 16 }, > + [SEMR] = { 0x14, 8 }, This is the parameter section for RZ/T and RZ/A2. Please update the comments above, to say this also applies to RZ/G2L. I can confirm the documentation for RZ/T1 and RZ/A2 agrees about the existence and behavior of SEMR. > }, > .fifosize = 16, > .overrun_reg = SCLSR, > @@ -2527,6 +2528,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, > case 27: smr_val |= SCSMR_SRC_27; break; > } > smr_val |= cks; > + if (sci_getreg(port, SEMR)->size) > + serial_port_out(port, SEMR, 0); As this is done in both branches of the if() statement, I think it should be moved up. > serial_port_out(port, SCSCR, scr_val | s->hscif_tot); > serial_port_out(port, SCSMR, smr_val); > serial_port_out(port, SCBRR, brr); > @@ -2561,6 +2564,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, > scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0); > smr_val |= serial_port_in(port, SCSMR) & > (SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS); > + if (sci_getreg(port, SEMR)->size) > + serial_port_out(port, SEMR, 0); (else branch) > serial_port_out(port, SCSCR, scr_val | s->hscif_tot); > serial_port_out(port, SCSMR, smr_val); > } > @@ -3170,6 +3175,10 @@ static const struct of_device_id of_sci_match[] = { > .compatible = "renesas,scif-r7s9210", > .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE), > }, > + { > + .compatible = "renesas,scif-r9a07g044", > + .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE), > + }, > /* Family-specific types */ > { > .compatible = "renesas,rcar-gen1-scif", The rest looks good to me. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index ef37fdf37612..872a2c3b11c4 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -306,6 +306,7 @@ static const struct sci_port_params sci_port_params[SCIx_NR_REGTYPES] = { [SCFDR] = { 0x0E, 16 }, [SCSPTR] = { 0x10, 16 }, [SCLSR] = { 0x12, 16 }, + [SEMR] = { 0x14, 8 }, }, .fifosize = 16, .overrun_reg = SCLSR, @@ -2527,6 +2528,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, case 27: smr_val |= SCSMR_SRC_27; break; } smr_val |= cks; + if (sci_getreg(port, SEMR)->size) + serial_port_out(port, SEMR, 0); serial_port_out(port, SCSCR, scr_val | s->hscif_tot); serial_port_out(port, SCSMR, smr_val); serial_port_out(port, SCBRR, brr); @@ -2561,6 +2564,8 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, scr_val = s->cfg->scscr & (SCSCR_CKE1 | SCSCR_CKE0); smr_val |= serial_port_in(port, SCSMR) & (SCSMR_CKEDG | SCSMR_SRC_MASK | SCSMR_CKS); + if (sci_getreg(port, SEMR)->size) + serial_port_out(port, SEMR, 0); serial_port_out(port, SCSCR, scr_val | s->hscif_tot); serial_port_out(port, SCSMR, smr_val); } @@ -3170,6 +3175,10 @@ static const struct of_device_id of_sci_match[] = { .compatible = "renesas,scif-r7s9210", .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE), }, + { + .compatible = "renesas,scif-r9a07g044", + .data = SCI_OF_DATA(PORT_SCIF, SCIx_RZ_SCIFA_REGTYPE), + }, /* Family-specific types */ { .compatible = "renesas,rcar-gen1-scif", @@ -3452,6 +3461,7 @@ static int __init rzscifa_early_console_setup(struct earlycon_device *device, port_cfg.regtype = SCIx_RZ_SCIFA_REGTYPE; return early_console_setup(device, PORT_SCIF); } + static int __init scifa_early_console_setup(struct earlycon_device *device, const char *opt) { @@ -3471,6 +3481,7 @@ static int __init hscif_early_console_setup(struct earlycon_device *device, OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup); OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup); OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup); +OF_EARLYCON_DECLARE(scif, "renesas,scif-r9a07g044", rzscifa_early_console_setup); OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup); OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup); OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup); diff --git a/drivers/tty/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h index c0dfe4382898..c0ae78632dda 100644 --- a/drivers/tty/serial/sh-sci.h +++ b/drivers/tty/serial/sh-sci.h @@ -31,6 +31,7 @@ enum { SCCKS, /* BRG Clock Select Register */ HSRTRGR, /* Rx FIFO Data Count Trigger Register */ HSTTRGR, /* Tx FIFO Data Count Trigger Register */ + SEMR, /* Serial extended mode register */ SCIx_NR_REGS, };