Message ID | 20210528192541.1120703-2-konrad.dybcio@somainline.org (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | [1/2] clk: qcom: msm8996-cpu: Add CBF support | expand |
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 10e6fecc9e13..99dc4068980d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2533,7 +2533,10 @@ apss_merge_funnel_out: endpoint { kryocc: clock-controller@6400000 { compatible = "qcom,msm8996-apcc"; - reg = <0x06400000 0x90000>; + reg = <0x06400000 0x90000>, <0x09a11000 0x10000>; + + assigned-clocks = <&kryocc 2>; + assigned-clock-rates = <1382400000>; clock-names = "xo"; clocks = <&xo_board>;
Add the CBF PLL register to the kryocc node and assign a frequency to the clock. This makes sure the core cluster interconnect is running at a decent speed, so that it's no longer a pain to use the device with all cores enabled. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)