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[95.117.63.46]) by smtp.googlemail.com with ESMTPSA id r17sm1866964edt.33.2021.07.02.15.52.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Jul 2021 15:52:01 -0700 (PDT) From: Martin Blumenstingl To: linux-clk@vger.kernel.org, sboyd@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Martin Blumenstingl , Maxime Coquelin , Alexandre Torgue , linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v1 4/6] clk: stm32f4: Switch to clk_divider.determine_rate Date: Sat, 3 Jul 2021 00:51:43 +0200 Message-Id: <20210702225145.2643303-5-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210702225145.2643303-1-martin.blumenstingl@googlemail.com> References: <20210702225145.2643303-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org .determine_rate is meant to replace .round_rate in CCF in the future. Switch over to .determine_rate now that clk_divider_ops has gained support for that. Cc: Maxime Coquelin Cc: Alexandre Torgue Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: Martin Blumenstingl --- drivers/clk/clk-stm32f4.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index 18117ce5ff85..22267fb3e92e 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -709,10 +709,10 @@ static unsigned long stm32f4_pll_div_recalc_rate(struct clk_hw *hw, return clk_divider_ops.recalc_rate(hw, parent_rate); } -static long stm32f4_pll_div_round_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *prate) +static int stm32f4_pll_div_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { - return clk_divider_ops.round_rate(hw, rate, prate); + return clk_divider_ops.determine_rate(hw, req); } static int stm32f4_pll_div_set_rate(struct clk_hw *hw, unsigned long rate, @@ -738,7 +738,7 @@ static int stm32f4_pll_div_set_rate(struct clk_hw *hw, unsigned long rate, static const struct clk_ops stm32f4_pll_div_ops = { .recalc_rate = stm32f4_pll_div_recalc_rate, - .round_rate = stm32f4_pll_div_round_rate, + .determine_rate = stm32f4_pll_div_determine_rate, .set_rate = stm32f4_pll_div_set_rate, };