| Message ID | 20220118202958.1840431-4-marex@denx.de (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [1/5] clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock | expand |
On 1/18/22 21:29, Marek Vasut wrote: > Add pinmux option for MCO2 pin. This is used on DHCOM when the > ethernet PHY 50 MHz clock is generated by the MCO2 on PG2 pin. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> > Cc: Christophe Roullier <christophe.roullier@foss.st.com> > Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > Cc: Patrice Chotard <patrice.chotard@foss.st.com> > Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: linux-clk@vger.kernel.org > Cc: linux-stm32@st-md-mailman.stormreply.com > To: linux-arm-kernel@lists.infradead.org > --- > arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi > index 2cd2ac9beaf20..6da84e3f05ea3 100644 > --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi > +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi > @@ -882,6 +882,21 @@ pins { > }; > }; > > + mco2_pins_a: mco2-0 { > + pins { > + pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */ > + bias-disable; > + drive-push-pull; > + slew-rate = <2>; > + }; > + }; > + > + mco2_sleep_pins_a: mco2-sleep-0 { > + pins { > + pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */ > + }; > + }; > + > m_can1_pins_a: m-can1-0 { > pins1 { > pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */ Applied on stm32-next thanks Alex
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi index 2cd2ac9beaf20..6da84e3f05ea3 100644 --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi @@ -882,6 +882,21 @@ pins { }; }; + mco2_pins_a: mco2-0 { + pins { + pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */ + bias-disable; + drive-push-pull; + slew-rate = <2>; + }; + }; + + mco2_sleep_pins_a: mco2-sleep-0 { + pins { + pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */ + }; + }; + m_can1_pins_a: m-can1-0 { pins1 { pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
Add pinmux option for MCO2 pin. This is used on DHCOM when the ethernet PHY 50 MHz clock is generated by the MCO2 on PG2 pin. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org --- arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)