| Message ID | 20220314114248.1636620-1-vladimir.zapolskiy@linaro.org (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | clk: qcom: add camera clock controller driver for SM8450 SoC | expand |
On Mon 14 Mar 06:42 CDT 2022, Vladimir Zapolskiy wrote: > Unify all exported PLL clock configuration functions and data structures > as GPL symbols. > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> > --- > drivers/clk/qcom/clk-alpha-pll.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c > index 288692f0ea39..47879ee5a677 100644 > --- a/drivers/clk/qcom/clk-alpha-pll.c > +++ b/drivers/clk/qcom/clk-alpha-pll.c > @@ -1823,7 +1823,7 @@ const struct clk_ops clk_alpha_pll_lucid_5lpe_ops = { > .round_rate = clk_alpha_pll_round_rate, > .set_rate = alpha_pll_lucid_5lpe_set_rate, > }; > -EXPORT_SYMBOL(clk_alpha_pll_lucid_5lpe_ops); > +EXPORT_SYMBOL_GPL(clk_alpha_pll_lucid_5lpe_ops); > > const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = { > .enable = alpha_pll_lucid_5lpe_enable, > @@ -1832,14 +1832,14 @@ const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = { > .recalc_rate = clk_trion_pll_recalc_rate, > .round_rate = clk_alpha_pll_round_rate, > }; > -EXPORT_SYMBOL(clk_alpha_pll_fixed_lucid_5lpe_ops); > +EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_lucid_5lpe_ops); > > const struct clk_ops clk_alpha_pll_postdiv_lucid_5lpe_ops = { > .recalc_rate = clk_alpha_pll_postdiv_fabia_recalc_rate, > .round_rate = clk_alpha_pll_postdiv_fabia_round_rate, > .set_rate = clk_lucid_5lpe_pll_postdiv_set_rate, > }; > -EXPORT_SYMBOL(clk_alpha_pll_postdiv_lucid_5lpe_ops); > +EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_lucid_5lpe_ops); > > void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, > const struct alpha_pll_config *config) > @@ -1992,7 +1992,7 @@ const struct clk_ops clk_alpha_pll_zonda_ops = { > .round_rate = clk_alpha_pll_round_rate, > .set_rate = clk_zonda_pll_set_rate, > }; > -EXPORT_SYMBOL(clk_alpha_pll_zonda_ops); > +EXPORT_SYMBOL_GPL(clk_alpha_pll_zonda_ops); > > static int alpha_pll_lucid_evo_enable(struct clk_hw *hw) > { > -- > 2.33.0 >
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 288692f0ea39..47879ee5a677 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -1823,7 +1823,7 @@ const struct clk_ops clk_alpha_pll_lucid_5lpe_ops = { .round_rate = clk_alpha_pll_round_rate, .set_rate = alpha_pll_lucid_5lpe_set_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_lucid_5lpe_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_lucid_5lpe_ops); const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = { .enable = alpha_pll_lucid_5lpe_enable, @@ -1832,14 +1832,14 @@ const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = { .recalc_rate = clk_trion_pll_recalc_rate, .round_rate = clk_alpha_pll_round_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_fixed_lucid_5lpe_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_lucid_5lpe_ops); const struct clk_ops clk_alpha_pll_postdiv_lucid_5lpe_ops = { .recalc_rate = clk_alpha_pll_postdiv_fabia_recalc_rate, .round_rate = clk_alpha_pll_postdiv_fabia_round_rate, .set_rate = clk_lucid_5lpe_pll_postdiv_set_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_postdiv_lucid_5lpe_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_lucid_5lpe_ops); void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) @@ -1992,7 +1992,7 @@ const struct clk_ops clk_alpha_pll_zonda_ops = { .round_rate = clk_alpha_pll_round_rate, .set_rate = clk_zonda_pll_set_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_zonda_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_zonda_ops); static int alpha_pll_lucid_evo_enable(struct clk_hw *hw) {
Unify all exported PLL clock configuration functions and data structures as GPL symbols. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> --- drivers/clk/qcom/clk-alpha-pll.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)