| Message ID | 20220920023709.4865-3-mailingradian@gmail.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | SDM670 RPMh Clocks (real) | expand |
On 20/09/2022 04:37, Richard Acayan wrote: > The Snapdragon 670 uses the RPMh mailbox for most of the clocks used in > SDM845 but omits two. Add clock data for SDM670 so the driver doesn't fail > to resolve a clock. > > Link: https://android.googlesource.com/kernel/msm/+/444bd8d6e2cf54698234c752e6de97b4b8a528bd%5E%21/#F7 NOT_FOUND: Requested entity was not found Do not add non-working links. > Signed-off-by: Richard Acayan <mailingradian@gmail.com> > --- > drivers/clk/qcom/clk-rpmh.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > Best regards, Krzysztof
On 20.09.2022 04:37, Richard Acayan wrote: > The Snapdragon 670 uses the RPMh mailbox for most of the clocks used in > SDM845 but omits two. Add clock data for SDM670 so the driver doesn't fail > to resolve a clock. > > Link: https://android.googlesource.com/kernel/msm/+/444bd8d6e2cf54698234c752e6de97b4b8a528bd%5E%21/#F7 > Signed-off-by: Richard Acayan <mailingradian@gmail.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Konrad > drivers/clk/qcom/clk-rpmh.c | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c > index 9739aab0fe82..0471bab82464 100644 > --- a/drivers/clk/qcom/clk-rpmh.c > +++ b/drivers/clk/qcom/clk-rpmh.c > @@ -378,6 +378,26 @@ static const struct clk_rpmh_desc clk_rpmh_sdm845 = { > .num_clks = ARRAY_SIZE(sdm845_rpmh_clocks), > }; > > +static struct clk_hw *sdm670_rpmh_clocks[] = { > + [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, > + [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, > + [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, > + [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, > + [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, > + [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, > + [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, > + [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, > + [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, > + [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, > + [RPMH_IPA_CLK] = &sdm845_ipa.hw, > + [RPMH_CE_CLK] = &sdm845_ce.hw, > +}; > + > +static const struct clk_rpmh_desc clk_rpmh_sdm670 = { > + .clks = sdm670_rpmh_clocks, > + .num_clks = ARRAY_SIZE(sdm670_rpmh_clocks), > +}; > + > DEFINE_CLK_RPMH_VRM(sdx55, rf_clk1, rf_clk1_ao, "rfclkd1", 1); > DEFINE_CLK_RPMH_VRM(sdx55, rf_clk2, rf_clk2_ao, "rfclkd2", 1); > DEFINE_CLK_RPMH_BCM(sdx55, qpic_clk, "QP0"); > @@ -711,6 +731,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { > { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, > { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, > { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, > + { .compatible = "qcom,sdm670-rpmh-clk", .data = &clk_rpmh_sdm670}, > { .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55}, > { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65}, > { .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350},
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index 9739aab0fe82..0471bab82464 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -378,6 +378,26 @@ static const struct clk_rpmh_desc clk_rpmh_sdm845 = { .num_clks = ARRAY_SIZE(sdm845_rpmh_clocks), }; +static struct clk_hw *sdm670_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, + [RPMH_CXO_CLK_A] = &sdm845_bi_tcxo_ao.hw, + [RPMH_LN_BB_CLK2] = &sdm845_ln_bb_clk2.hw, + [RPMH_LN_BB_CLK2_A] = &sdm845_ln_bb_clk2_ao.hw, + [RPMH_LN_BB_CLK3] = &sdm845_ln_bb_clk3.hw, + [RPMH_LN_BB_CLK3_A] = &sdm845_ln_bb_clk3_ao.hw, + [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, + [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, + [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, + [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, + [RPMH_IPA_CLK] = &sdm845_ipa.hw, + [RPMH_CE_CLK] = &sdm845_ce.hw, +}; + +static const struct clk_rpmh_desc clk_rpmh_sdm670 = { + .clks = sdm670_rpmh_clocks, + .num_clks = ARRAY_SIZE(sdm670_rpmh_clocks), +}; + DEFINE_CLK_RPMH_VRM(sdx55, rf_clk1, rf_clk1_ao, "rfclkd1", 1); DEFINE_CLK_RPMH_VRM(sdx55, rf_clk2, rf_clk2_ao, "rfclkd2", 1); DEFINE_CLK_RPMH_BCM(sdx55, qpic_clk, "QP0"); @@ -711,6 +731,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { { .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x}, { .compatible = "qcom,sc8280xp-rpmh-clk", .data = &clk_rpmh_sc8280xp}, { .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845}, + { .compatible = "qcom,sdm670-rpmh-clk", .data = &clk_rpmh_sdm670}, { .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55}, { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65}, { .compatible = "qcom,sm6350-rpmh-clk", .data = &clk_rpmh_sm6350},
The Snapdragon 670 uses the RPMh mailbox for most of the clocks used in SDM845 but omits two. Add clock data for SDM670 so the driver doesn't fail to resolve a clock. Link: https://android.googlesource.com/kernel/msm/+/444bd8d6e2cf54698234c752e6de97b4b8a528bd%5E%21/#F7 Signed-off-by: Richard Acayan <mailingradian@gmail.com> --- drivers/clk/qcom/clk-rpmh.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)