@@ -83,6 +83,20 @@ anaclk2: anaclk2 {
#clock-cells = <0>;
clock-frequency = <0>;
};
+
+ ipp_di0: ipp-di0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "ipp_di0";
+ };
+
+ ipp_di1: ipp-di1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ clock-output-names = "ipp_di1";
+ };
};
ldb: ldb {
@@ -699,9 +713,11 @@ clks: clock-controller@20c4000 {
<0 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&osc>, <&ckil>, <&ckih1>,
- <&anaclk1>, <&anaclk2>;
+ <&anaclk1>, <&anaclk2>,
+ <&ipp_di0>, <&ipp_di1>;
clock-names = "osc", "ckil", "ckih1",
- "anaclk1", "anaclk2";
+ "anaclk1", "anaclk2",
+ "ipp_di0", "ipp_di1";
};
anatop: anatop@20c8000 {
These are external input clocks and a rate must be provided explicitly. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- arch/arm/boot/dts/imx6qdl.dtsi | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-)