Message ID | 20221018-clk-range-checks-fixes-v4-36-971d5077e7d2@cerno.tech (mailing list archive) |
---|---|
State | Accepted, archived |
Headers | show
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Fri, 5 May 2023 07:27:31 -0400 (EDT) From: Maxime Ripard <maxime@cerno.tech> Date: Fri, 05 May 2023 13:25:38 +0200 Subject: [PATCH v4 36/68] clk: tegra: periph: Add a determine_rate hook MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20221018-clk-range-checks-fixes-v4-36-971d5077e7d2@cerno.tech> References: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> In-Reply-To: <20221018-clk-range-checks-fixes-v4-0-971d5077e7d2@cerno.tech> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org, Maxime Ripard <maxime@cerno.tech>, Jonathan Hunter <jonathanh@nvidia.com>, Peter De Schrijver <pdeschrijver@nvidia.com>, Prashant Gaikwad <pgaikwad@nvidia.com>, Thierry Reding <thierry.reding@gmail.com>, linux-tegra@vger.kernel.org X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2126; i=maxime@cerno.tech; h=from:subject:message-id; bh=cxoJgtX4So4bmPh0M56fxVCzJPBLLEFUvLjHWdQ3NZA=; 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Series |
clk: Make determine_rate mandatory for muxes
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expand
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diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index 79ca3aa072b7..ea443366e972 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -140,6 +140,7 @@ const struct clk_ops tegra_clk_periph_ops = { }; static const struct clk_ops tegra_clk_periph_nodiv_ops = { + .determine_rate = clk_hw_determine_rate_no_reparent, .get_parent = clk_periph_get_parent, .set_parent = clk_periph_set_parent, .is_enabled = clk_periph_is_enabled,
The Tegra periph nodiv clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. However, the upstream device trees seem to use assigned-clock-parents on that clock to force the parent at boot time, so it's likely that the author intent was to force the parent through the device tree and prevent any reparenting but through an explicit call to clk_set_parent(). This case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Peter De Schrijver <pdeschrijver@nvidia.com> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- drivers/clk/tegra/clk-periph.c | 1 + 1 file changed, 1 insertion(+)