diff mbox series

[v2] clk: qcom: gcc-sm8250: Use retention mode for USB GDSCs

Message ID 20221102091320.66007-1-manivannan.sadhasivam@linaro.org (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series [v2] clk: qcom: gcc-sm8250: Use retention mode for USB GDSCs | expand

Commit Message

Manivannan Sadhasivam Nov. 2, 2022, 9:13 a.m. UTC
USB controllers on SM8250 doesn't work after coming back from suspend.
This can be fixed by keeping the USB GDSCs in retention mode so that
hardware can keep them ON and put into rentention mode once the parent
domain goes to a low power state.

Fixes: 3e5770921a88 ("clk: qcom: gcc: Add global clock controller driver for SM8250")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---

Changes in v2:

* Added Fixes tag (Stephen)

 drivers/clk/qcom/gcc-sm8250.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Bjorn Andersson Nov. 7, 2022, 3:12 a.m. UTC | #1
On Wed, 2 Nov 2022 14:43:20 +0530, Manivannan Sadhasivam wrote:
> USB controllers on SM8250 doesn't work after coming back from suspend.
> This can be fixed by keeping the USB GDSCs in retention mode so that
> hardware can keep them ON and put into rentention mode once the parent
> domain goes to a low power state.
> 
> 

Applied, thanks!

[1/1] clk: qcom: gcc-sm8250: Use retention mode for USB GDSCs
      commit: ac1c5a03d3772b1db25e8092f771aa33f6ae2f7e

Best regards,
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-sm8250.c b/drivers/clk/qcom/gcc-sm8250.c
index 9755ef4888c1..a0ba37656b07 100644
--- a/drivers/clk/qcom/gcc-sm8250.c
+++ b/drivers/clk/qcom/gcc-sm8250.c
@@ -3267,7 +3267,7 @@  static struct gdsc usb30_prim_gdsc = {
 	.pd = {
 		.name = "usb30_prim_gdsc",
 	},
-	.pwrsts = PWRSTS_OFF_ON,
+	.pwrsts = PWRSTS_RET_ON,
 };
 
 static struct gdsc usb30_sec_gdsc = {
@@ -3275,7 +3275,7 @@  static struct gdsc usb30_sec_gdsc = {
 	.pd = {
 		.name = "usb30_sec_gdsc",
 	},
-	.pwrsts = PWRSTS_OFF_ON,
+	.pwrsts = PWRSTS_RET_ON,
 };
 
 static struct gdsc hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc = {