| Message ID | 20221109005631.3189-1-ansuelsmth@gmail.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | [1/5] clk: qcom: krait-cc: fix wrong parent order for secondary mux | expand |
On Wed, 9 Nov 2022 01:56:27 +0100, Christian Marangi wrote: > The secondary mux parent order is swapped. > This currently doesn't cause problems as the secondary mux is used for idle > clk and as a safe clk source while reprogramming the hfpll. > > Each mux have 2 or more output but he always have a safe source to > switch while reprogramming the connected pll. We use a clk notifier to > switch to the correct parent before clk core can apply the correct rate. > The parent to switch is hardcoded in the mux struct. > > [...] Applied, thanks! [1/5] clk: qcom: krait-cc: fix wrong parent order for secondary mux commit: 8e456411abcbf899c04740b9dbb3dcefcd61c946 [2/5] clk: qcom: krait-cc: also enable secondary mux and div clk commit: 18ae57b1e8abee6c453381470f6e18991d2901a8 [3/5] clk: qcom: krait-cc: handle secondary mux sourcing out of acpu_aux commit: e5dc1a4c01510da8438dddfdf4200b79d73990dc [4/5] clk: qcom: krait-cc: convert to devm_clk_hw_register commit: 8ea9fb841a7e528bc8ae79d726ce951dcf7b46e2 [5/5] clk: qcom: krait-cc: convert to parent_data API commit: 56a655e1c41a86445cf2de656649ad93424b2a63 Best regards,
diff --git a/drivers/clk/qcom/krait-cc.c b/drivers/clk/qcom/krait-cc.c index cfd961d5cc45..c2a261cfeb6a 100644 --- a/drivers/clk/qcom/krait-cc.c +++ b/drivers/clk/qcom/krait-cc.c @@ -116,8 +116,8 @@ krait_add_sec_mux(struct device *dev, int id, const char *s, int ret; struct krait_mux_clk *mux; static const char *sec_mux_list[] = { - "acpu_aux", "qsb", + "acpu_aux", }; struct clk_init_data init = { .parent_names = sec_mux_list,
The secondary mux parent order is swapped. This currently doesn't cause problems as the secondary mux is used for idle clk and as a safe clk source while reprogramming the hfpll. Each mux have 2 or more output but he always have a safe source to switch while reprogramming the connected pll. We use a clk notifier to switch to the correct parent before clk core can apply the correct rate. The parent to switch is hardcoded in the mux struct. For the secondary mux the safe source to use is the qsb parent as it's the only fixed clk as the acpus_aux is a pll that can source from pxo or from pll8. The hardcoded safe parent for the secondary mux is set to index 0 that in the secondary mux map is set to 2. But the index 0 is actually acpu_aux in the parent list. Fix the swapped parents to correctly handle idle frequency and output a sane clk_summary report. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> --- drivers/clk/qcom/krait-cc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)