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[2a01:c23:c49f:b200::e63]) by smtp.googlemail.com with ESMTPSA id ku22-20020a170907789600b007c10d47e748sm4062567ejc.36.2022.12.25.13.26.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Dec 2022 13:26:42 -0800 (PST) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, jbrunet@baylibre.com, Martin Blumenstingl Subject: [PATCH v1 4/4] clk: meson: clk-cpu-dyndiv: switch from .round_rate to .determine_rate Date: Sun, 25 Dec 2022 22:26:32 +0100 Message-Id: <20221225212632.2760126-5-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221225212632.2760126-1-martin.blumenstingl@googlemail.com> References: <20221225212632.2760126-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org clk_ops.round_rate will be removed at some point. It's replacement is .determine_rate. Switch clk-cpu-dyndiv over to use .determine_rate. Signed-off-by: Martin Blumenstingl --- drivers/clk/meson/clk-cpu-dyndiv.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/clk/meson/clk-cpu-dyndiv.c b/drivers/clk/meson/clk-cpu-dyndiv.c index 36976927fe82..8778c149d26a 100644 --- a/drivers/clk/meson/clk-cpu-dyndiv.c +++ b/drivers/clk/meson/clk-cpu-dyndiv.c @@ -27,14 +27,13 @@ static unsigned long meson_clk_cpu_dyndiv_recalc_rate(struct clk_hw *hw, NULL, 0, data->div.width); } -static long meson_clk_cpu_dyndiv_round_rate(struct clk_hw *hw, - unsigned long rate, - unsigned long *prate) +static int meson_clk_cpu_dyndiv_determine_rate(struct clk_hw *hw, + struct clk_rate_request *req) { struct clk_regmap *clk = to_clk_regmap(hw); struct meson_clk_cpu_dyndiv_data *data = meson_clk_cpu_dyndiv_data(clk); - return divider_round_rate(hw, rate, prate, NULL, data->div.width, 0); + return divider_determine_rate(hw, req, NULL, data->div.width, 0); } static int meson_clk_cpu_dyndiv_set_rate(struct clk_hw *hw, unsigned long rate, @@ -63,7 +62,7 @@ static int meson_clk_cpu_dyndiv_set_rate(struct clk_hw *hw, unsigned long rate, const struct clk_ops meson_clk_cpu_dyndiv_ops = { .recalc_rate = meson_clk_cpu_dyndiv_recalc_rate, - .round_rate = meson_clk_cpu_dyndiv_round_rate, + .determine_rate = meson_clk_cpu_dyndiv_determine_rate, .set_rate = meson_clk_cpu_dyndiv_set_rate, }; EXPORT_SYMBOL_GPL(meson_clk_cpu_dyndiv_ops);