Message ID | 20230301002657.352637-3-Mr.Bossman075@gmail.com (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | Add RISC-V 32 NOMMU support | expand |
On 3/1/23 09:26, Jesse Taube wrote: > From: Yimin Gu <ustcymgu@gmail.com> > > Some RISC-V 32bit cores do not have an MMU, and the kernel should be > able to build for them. This patch enables the RV32 to be built with > no MMU support. > > Signed-off-by: Yimin Gu <ustcymgu@gmail.com> > CC: Jesse Taube <Mr.Bossman075@gmail.com> > Tested-by: Waldemar Brodkorb <wbx@openadk.org> > Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com> Looks OK. Reviewed-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index c5e42cc37604..d1f661425790 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -177,8 +177,8 @@ config MMU config PAGE_OFFSET hex - default 0xC0000000 if 32BIT - default 0x80000000 if 64BIT && !MMU + default 0xC0000000 if 32BIT && MMU + default 0x80000000 if !MMU default 0xff60000000000000 if 64BIT config KASAN_SHADOW_OFFSET @@ -279,7 +279,6 @@ config ARCH_RV32I select GENERIC_LIB_ASHRDI3 select GENERIC_LIB_LSHRDI3 select GENERIC_LIB_UCMPDI2 - select MMU config ARCH_RV64I bool "RV64I"