| Message ID | 20231111160806.32954-3-marek.vasut+renesas@mailbox.org (mailing list archive) |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v2,1/4] dt-bindings: clk: rs9: Add 9FGV0841 | expand |
Hi Marek Vasut, > Subject: [PATCH v2 3/4] clk: rs9: Replace model check with bitshift from > chip data > > Adjust rs9_calc_dif() to special-case the 9FGV0241 where DIFx bits start > at 1, encode this shift into chip data and drop the model check entirely. > > Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> > --- > Cc: Alexander Stein <alexander.stein@ew.tq-group.com> > Cc: Conor Dooley <conor+dt@kernel.org> > Cc: Geert Uytterhoeven <geert+renesas@glider.be> > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > Cc: Michael Turquette <mturquette@baylibre.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Stephen Boyd <sboyd@kernel.org> > Cc: devicetree@vger.kernel.org > Cc: linux-clk@vger.kernel.org > Cc: linux-renesas-soc@vger.kernel.org > --- > V2: New patch Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Do you need enum rs9_model as it is unused after this patch?? Cheers, Biju > --- > drivers/clk/clk-renesas-pcie.c | 20 +++++++++----------- > 1 file changed, 9 insertions(+), 11 deletions(-) > > diff --git a/drivers/clk/clk-renesas-pcie.c b/drivers/clk/clk-renesas- > pcie.c index b5c430e4899c..5064016afbc3 100644 > --- a/drivers/clk/clk-renesas-pcie.c > +++ b/drivers/clk/clk-renesas-pcie.c > @@ -58,8 +58,8 @@ enum rs9_model { > > /* Structure to describe features of a particular 9-series model */ > struct rs9_chip_info { > - const enum rs9_model model; > unsigned int num_clks; > + u8 outshift; > u8 did; > }; > > @@ -161,14 +161,12 @@ static const struct regmap_config rs9_regmap_config > = { > > static u8 rs9_calc_dif(const struct rs9_driver_data *rs9, int idx) { > - enum rs9_model model = rs9->chip_info->model; > - > - if (model == RENESAS_9FGV0241) > - return BIT(idx + 1); > - else if (model == RENESAS_9FGV0441) > - return BIT(idx); > - > - return 0; > + /* > + * On 9FGV0241, the DIF OE0 is BIT(1) and DIF OE(1) is BIT(2), > + * on 9FGV0441 and 9FGV0841 the DIF OE0 is BIT(0) and so on. > + * Increment the index in the 9FGV0241 special case here. > + */ > + return BIT(idx + rs9->chip_info->outshift); > } > > static int rs9_get_output_config(struct rs9_driver_data *rs9, int idx) @@ > -382,14 +380,14 @@ static int __maybe_unused rs9_resume(struct device > *dev) } > > static const struct rs9_chip_info renesas_9fgv0241_info = { > - .model = RENESAS_9FGV0241, > .num_clks = 2, > + .outshift = 1, > .did = RS9_REG_DID_TYPE_FGV | 0x02, > }; > > static const struct rs9_chip_info renesas_9fgv0441_info = { > - .model = RENESAS_9FGV0441, > .num_clks = 4, > + .outshift = 0, > .did = RS9_REG_DID_TYPE_FGV | 0x04, > }; > > -- > 2.42.0
On 11/11/23 17:14, Biju Das wrote: > Hi Marek Vasut, > >> Subject: [PATCH v2 3/4] clk: rs9: Replace model check with bitshift from >> chip data >> >> Adjust rs9_calc_dif() to special-case the 9FGV0241 where DIFx bits start >> at 1, encode this shift into chip data and drop the model check entirely. >> >> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> >> --- >> Cc: Alexander Stein <alexander.stein@ew.tq-group.com> >> Cc: Conor Dooley <conor+dt@kernel.org> >> Cc: Geert Uytterhoeven <geert+renesas@glider.be> >> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> >> Cc: Michael Turquette <mturquette@baylibre.com> >> Cc: Rob Herring <robh+dt@kernel.org> >> Cc: Stephen Boyd <sboyd@kernel.org> >> Cc: devicetree@vger.kernel.org >> Cc: linux-clk@vger.kernel.org >> Cc: linux-renesas-soc@vger.kernel.org >> --- >> V2: New patch > > Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> > > Do you need enum rs9_model as it is unused after this patch?? Dropped in V3 , thanks. Can you check the other patches too ? I'll send V3 tomorrow-ish.
diff --git a/drivers/clk/clk-renesas-pcie.c b/drivers/clk/clk-renesas-pcie.c index b5c430e4899c..5064016afbc3 100644 --- a/drivers/clk/clk-renesas-pcie.c +++ b/drivers/clk/clk-renesas-pcie.c @@ -58,8 +58,8 @@ enum rs9_model { /* Structure to describe features of a particular 9-series model */ struct rs9_chip_info { - const enum rs9_model model; unsigned int num_clks; + u8 outshift; u8 did; }; @@ -161,14 +161,12 @@ static const struct regmap_config rs9_regmap_config = { static u8 rs9_calc_dif(const struct rs9_driver_data *rs9, int idx) { - enum rs9_model model = rs9->chip_info->model; - - if (model == RENESAS_9FGV0241) - return BIT(idx + 1); - else if (model == RENESAS_9FGV0441) - return BIT(idx); - - return 0; + /* + * On 9FGV0241, the DIF OE0 is BIT(1) and DIF OE(1) is BIT(2), + * on 9FGV0441 and 9FGV0841 the DIF OE0 is BIT(0) and so on. + * Increment the index in the 9FGV0241 special case here. + */ + return BIT(idx + rs9->chip_info->outshift); } static int rs9_get_output_config(struct rs9_driver_data *rs9, int idx) @@ -382,14 +380,14 @@ static int __maybe_unused rs9_resume(struct device *dev) } static const struct rs9_chip_info renesas_9fgv0241_info = { - .model = RENESAS_9FGV0241, .num_clks = 2, + .outshift = 1, .did = RS9_REG_DID_TYPE_FGV | 0x02, }; static const struct rs9_chip_info renesas_9fgv0441_info = { - .model = RENESAS_9FGV0441, .num_clks = 4, + .outshift = 0, .did = RS9_REG_DID_TYPE_FGV | 0x04, };
Adjust rs9_calc_dif() to special-case the 9FGV0241 where DIFx bits start at 1, encode this shift into chip data and drop the model check entirely. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> --- Cc: Alexander Stein <alexander.stein@ew.tq-group.com> Cc: Conor Dooley <conor+dt@kernel.org> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Stephen Boyd <sboyd@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org --- V2: New patch --- drivers/clk/clk-renesas-pcie.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-)