| Message ID | 20231123053409.10192-1-shubhrajyoti.datta@amd.com (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | dt-bindings: clock: versal: Make alt_ref optional | expand |
On Thu, 23 Nov 2023 11:04:09 +0530, Shubhrajyoti Datta wrote: > The alt_ref is present only in Versal-net devices. > Other versal devices do not have it so lets make alt_ref optional. > Changing the order of the clock items to have the optional ones at > the end. > > Fixes: 352546805a44 ("dt-bindings: clock: Add bindings for versal clock driver") > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> > --- > > .../devicetree/bindings/clock/xlnx,versal-clk.yaml | 14 ++++++++------ > 1 file changed, 8 insertions(+), 6 deletions(-) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.example.dtb: versal-firmware: clock-controller:clock-names:1: 'pl_alt_ref' was expected from schema $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.example.dtb: versal-firmware: clock-controller:clock-names:2: 'alt_ref' was expected from schema $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.example.dtb: clock-controller: clock-names:1: 'pl_alt_ref' was expected from schema $id: http://devicetree.org/schemas/clock/xlnx,versal-clk.yaml# /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.example.dtb: clock-controller: clock-names:2: 'alt_ref' was expected from schema $id: http://devicetree.org/schemas/clock/xlnx,versal-clk.yaml# doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20231123053409.10192-1-shubhrajyoti.datta@amd.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 23/11/2023 06:34, Shubhrajyoti Datta wrote: > The alt_ref is present only in Versal-net devices. > Other versal devices do not have it so lets make alt_ref optional. > Changing the order of the clock items to have the optional ones at > the end. One device has clock, other not, so you re-order the clocks? No, that's not the reason to re-order clocks. Add proper constraints for your variant. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml index 1ba687d433b1..746e49383074 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml @@ -31,11 +31,11 @@ properties: clocks: description: List of clock specifiers which are external input clocks to the given clock controller. - minItems: 3 + minItems: 2 maxItems: 8 clock-names: - minItems: 3 + minItems: 2 maxItems: 8 required: @@ -57,16 +57,18 @@ allOf: then: properties: clocks: + minItems: 2 items: - description: reference clock - - description: alternate reference clock - description: alternate reference clock for programmable logic + - description: alternate reference clock clock-names: + minItems: 2 items: - const: ref - - const: alt_ref - const: pl_alt_ref + - const: alt_ref - if: properties: @@ -110,8 +112,8 @@ examples: versal_clk: clock-controller { #clock-cells = <1>; compatible = "xlnx,versal-clk"; - clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>; - clock-names = "ref", "alt_ref", "pl_alt_ref"; + clocks = <&ref>, <&pl_alt_ref>; + clock-names = "ref", "pl_alt_ref"; }; }; };
The alt_ref is present only in Versal-net devices. Other versal devices do not have it so lets make alt_ref optional. Changing the order of the clock items to have the optional ones at the end. Fixes: 352546805a44 ("dt-bindings: clock: Add bindings for versal clock driver") Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> --- .../devicetree/bindings/clock/xlnx,versal-clk.yaml | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-)