| Message ID | 20231128104348.16372-1-shubhrajyoti.datta@amd.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Headers | show |
| Series | [v3] dt-bindings: Remove alt_ref from versal | expand |
On Tue, Nov 28, 2023 at 04:13:48PM +0530, Shubhrajyoti Datta wrote: > The alt_ref is present only in Versal-net devices. > Other versal devices do not have it. So remove alt_ref > for versal. > > Fixes: 352546805a44 ("dt-bindings: clock: Add bindings for versal clock driver") > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Cheers, Conor.
Quoting Shubhrajyoti Datta (2023-11-28 02:43:48) > The alt_ref is present only in Versal-net devices. > Other versal devices do not have it. So remove alt_ref > for versal. > > Fixes: 352546805a44 ("dt-bindings: clock: Add bindings for versal clock driver") > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> > > --- Applied to clk-next
diff --git a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml index 1ba687d433b1..bef109d163a8 100644 --- a/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml +++ b/Documentation/devicetree/bindings/clock/xlnx,versal-clk.yaml @@ -31,11 +31,11 @@ properties: clocks: description: List of clock specifiers which are external input clocks to the given clock controller. - minItems: 3 + minItems: 2 maxItems: 8 clock-names: - minItems: 3 + minItems: 2 maxItems: 8 required: @@ -59,15 +59,34 @@ allOf: clocks: items: - description: reference clock - - description: alternate reference clock - description: alternate reference clock for programmable logic clock-names: items: - const: ref - - const: alt_ref - const: pl_alt_ref + - if: + properties: + compatible: + contains: + enum: + - xlnx,versal-net-clk + + then: + properties: + clocks: + items: + - description: reference clock + - description: alternate reference clock for programmable logic + - description: alternate reference clock + + clock-names: + items: + - const: ref + - const: pl_alt_ref + - const: alt_ref + - if: properties: compatible: @@ -110,8 +129,8 @@ examples: versal_clk: clock-controller { #clock-cells = <1>; compatible = "xlnx,versal-clk"; - clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>; - clock-names = "ref", "alt_ref", "pl_alt_ref"; + clocks = <&ref>, <&pl_alt_ref>; + clock-names = "ref", "pl_alt_ref"; }; }; }; diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml index 822864488dcb..8e584857ddd4 100644 --- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml @@ -95,8 +95,8 @@ examples: versal_clk: clock-controller { #clock-cells = <1>; compatible = "xlnx,versal-clk"; - clocks = <&ref>, <&alt_ref>, <&pl_alt_ref>; - clock-names = "ref", "alt_ref", "pl_alt_ref"; + clocks = <&ref>, <&pl_alt_ref>; + clock-names = "ref", "pl_alt_ref"; }; };
The alt_ref is present only in Versal-net devices. Other versal devices do not have it. So remove alt_ref for versal. Fixes: 352546805a44 ("dt-bindings: clock: Add bindings for versal clock driver") Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@amd.com> --- Changes in v3: squash the patch Changes in v2: - Have specific constraints for versal and versal net. .../bindings/clock/xlnx,versal-clk.yaml | 31 +++++++++++++++---- .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 4 +-- 2 files changed, 27 insertions(+), 8 deletions(-)