| Message ID | 20231213185114.47565-4-sebastian.reichel@collabora.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | rockchip: clk: improve GATE_LINK support | expand |
On 13/12/2023 19:46, Sebastian Reichel wrote: > Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed > for HDMI support. > > Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> > --- Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h b/include/dt-bindings/clock/rockchip,rk3588-cru.h index 7c6f0ec7c979..0c7d3ca2d5bc 100644 --- a/include/dt-bindings/clock/rockchip,rk3588-cru.h +++ b/include/dt-bindings/clock/rockchip,rk3588-cru.h @@ -733,6 +733,7 @@ #define ACLK_AV1_PRE 718 #define PCLK_AV1_PRE 719 #define HCLK_SDIO_PRE 720 +#define PCLK_VO1GRF 721 /* scmi-clocks indices */
Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed for HDMI support. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> --- include/dt-bindings/clock/rockchip,rk3588-cru.h | 1 + 1 file changed, 1 insertion(+)