Message ID | 20231219232442.2460166-3-cristian.ciocaltea@collabora.com (mailing list archive) |
---|---|
State | Accepted, archived |
Headers | show |
Series | Clock changes to improve dwmac-starfive ethernet | expand |
Quoting Cristian Ciocaltea (2023-12-19 15:24:40) > From: Emil Renner Berthing <emil.renner.berthing@canonical.com> > > This is needed by the dwmac-starfive ethernet driver to set the clock > for 1000, 100 and 10 Mbps links properly. > > Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> > Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> > Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> > --- Applied to clk-next
diff --git a/drivers/clk/starfive/clk-starfive-jh7100.c b/drivers/clk/starfive/clk-starfive-jh7100.c index d3b260c01d5c..03f6f26a15d8 100644 --- a/drivers/clk/starfive/clk-starfive-jh7100.c +++ b/drivers/clk/starfive/clk-starfive-jh7100.c @@ -200,7 +200,7 @@ static const struct jh71x0_clk_data jh7100_clk_data[] __initconst = { JH71X0_GDIV(JH7100_CLK_GMAC_GTX, "gmac_gtxclk", 0, 255, JH7100_CLK_GMAC_ROOT_DIV), JH71X0_GDIV(JH7100_CLK_GMAC_RMII_TX, "gmac_rmii_txclk", 0, 8, JH7100_CLK_GMAC_RMII_REF), JH71X0_GDIV(JH7100_CLK_GMAC_RMII_RX, "gmac_rmii_rxclk", 0, 8, JH7100_CLK_GMAC_RMII_REF), - JH71X0__MUX(JH7100_CLK_GMAC_TX, "gmac_tx", 0, 3, + JH71X0__MUX(JH7100_CLK_GMAC_TX, "gmac_tx", CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, 3, JH7100_CLK_GMAC_GTX, JH7100_CLK_GMAC_TX_INV, JH7100_CLK_GMAC_RMII_TX),