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[178.235.179.81]) by smtp.gmail.com with ESMTPSA id bs18-20020a170906d1d200b00a2808ee8ab1sm3892978ejb.150.2024.01.08.04.32.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 04:32:35 -0800 (PST) From: Konrad Dybcio Date: Mon, 08 Jan 2024 13:32:20 +0100 Subject: [PATCH 03/18] clk: qcom: reset: Ensure write completion on reset de/assertion Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240105-topic-venus_reset-v1-3-981c7a624855@linaro.org> References: <20240105-topic-venus_reset-v1-0-981c7a624855@linaro.org> In-Reply-To: <20240105-topic-venus_reset-v1-0-981c7a624855@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Philipp Zabel Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue , Dikshita Agarwal , Vikash Garodia , Konrad Dybcio , Manivannan Sadhasivam X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1704717148; l=1265; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=JNyercWD/irj0WnMZM+/XNK5jH058/unr+ghbvtjtsA=; b=PiEP2x1LKi1nXUSfujrMpb2rsufCxzBXzXIuwd/XKExri1mGJnHEXZM3mYML6D2hNcbfCq9s1 DnonS2BI0z8AfP+XkIRhdNm+Z1N1OVN22WZJpK8p9rxnLjRjT4QpIxh X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Trying to toggle the resets in a rapid fashion can lead to the changes not actually arriving at the clock controller block when we expect them to. This was observed at least on SM8250. Read back the value after regmap_update_bits to ensure write completion. Fixes: db1029814f1f ("clk: qcom: reset: Ensure write completion on reset de/assertion") Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/reset.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/reset.c b/drivers/clk/qcom/reset.c index c4ac4d18829b..57024d1a0524 100644 --- a/drivers/clk/qcom/reset.c +++ b/drivers/clk/qcom/reset.c @@ -33,7 +33,12 @@ static int qcom_reset_set_assert(struct reset_controller_dev *rcdev, unsigned lo map = &rst->reset_map[id]; mask = map->bitmask ? map->bitmask : BIT(map->bit); - return regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + regmap_update_bits(rst->regmap, map->reg, mask, assert ? mask : 0); + + /* Read back the register to ensure write completion, ignore the value */ + regmap_read(rst->regmap, map->reg, &mask); + + return 0; } static int qcom_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)