| Message ID | 20240125-dispcc-sm8550-sm8650-drop-disp-ahb-clk-v1-1-0f8d96156156@linaro.org (mailing list archive) |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
| Series | clk: qcom: sm8[56]50: Drop the Disp AHB clock from Display Clock Controller | expand |
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml index c129f8c16b50..6660d38bef86 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml @@ -25,7 +25,6 @@ properties: items: - description: Board XO source - description: Board Always On XO source - - description: Display's AHB clock - description: sleep clock - description: Byte clock from DSI PHY0 - description: Pixel clock from DSI PHY0 @@ -82,7 +81,6 @@ examples: reg = <0x0af00000 0x10000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>, - <&gcc GCC_DISP_AHB_CLK>, <&sleep_clk>, <&dsi0_phy 0>, <&dsi0_phy 1>,
The Disp AHB clock is not registered, but enabled on probe, by the SM8650 and SM8550 GCC drivers. So drop the clock from dispcc node. Fixes: 553f9bd45554 ("dt-bindings: clock: document SM8550 DISPCC clock controller") Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml | 2 -- 1 file changed, 2 deletions(-)