Message ID | 20240130093812.1746512-3-andre.draszik@linaro.org (mailing list archive) |
---|---|
State | Not Applicable, archived |
Headers | show |
Series | gs101 oriole: peripheral block 0 (peric0) fixes | expand |
On 30/01/2024 10:36, André Draszik wrote: > While commit 6d44d1a1fb62 ("arm64: dts: exynos: gs101: define USI8 with > I2C configuration") states that the USI8 CONFIG is 0 at reset, the boot > loader has configured it by the time Linux runs and it has a different > value at this stage. This issue was pointed during review: https://lore.kernel.org/all/CAPLW+4=U9DBmwgxyWz3cy=V-Ui7s2Z9um4xbEuyax1o=0zB_NA@mail.gmail.com/ Yet you posted new version of patchset not implementing this, just to do it week later as new patch. Sorry guys, it seems you need much more time to accept and go through review, I will use two weeks delay time for applying GS patches. Now, for the patch, we don't do it for any other nodes which have 0 as reset value and we do not know what bootloader does there. Bootloader also can change. This is a required property, therefore please explain me how, really how, this can happen: " we should set it to none here so as to ensure things don't work by accident" NAK Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi index aaac04df5e65..bc251e565be6 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi @@ -384,6 +384,7 @@ usi8: usi@109700c0 { <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>; clock-names = "pclk", "ipclk"; samsung,sysreg = <&sysreg_peric0 0x101c>; + samsung,mode = <USI_V2_NONE>; status = "disabled"; hsi2c_8: i2c@10970000 {